1*8966eb4cSTom Rix /* 2*8966eb4cSTom Rix * Copyright (c) 2009 Wind River Systems, Inc. 3*8966eb4cSTom Rix * Tom Rix <Tom.Rix at windriver.com> 4*8966eb4cSTom Rix * 5*8966eb4cSTom Rix * This program is free software; you can redistribute it and/or 6*8966eb4cSTom Rix * modify it under the terms of the GNU General Public License as 7*8966eb4cSTom Rix * published by the Free Software Foundation; either version 2 of 8*8966eb4cSTom Rix * the License, or (at your option) any later version. 9*8966eb4cSTom Rix * 10*8966eb4cSTom Rix * This program is distributed in the hope that it will be useful, 11*8966eb4cSTom Rix * but WITHOUT ANY WARRANTY; without even the implied warranty of 12*8966eb4cSTom Rix * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13*8966eb4cSTom Rix * GNU General Public License for more details. 14*8966eb4cSTom Rix * 15*8966eb4cSTom Rix * You should have received a copy of the GNU General Public License 16*8966eb4cSTom Rix * along with this program; if not, write to the Free Software 17*8966eb4cSTom Rix * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 18*8966eb4cSTom Rix * MA 02111-1307 USA 19*8966eb4cSTom Rix * 20*8966eb4cSTom Rix * Derived from code on omapzoom, git://git.omapzoom.com/repo/u-boot.git 21*8966eb4cSTom Rix * 22*8966eb4cSTom Rix * Copyright (C) 2007-2009 Texas Instruments, Inc. 23*8966eb4cSTom Rix */ 24*8966eb4cSTom Rix 25*8966eb4cSTom Rix #ifndef TWL4030_H 26*8966eb4cSTom Rix #define TWL4030_H 27*8966eb4cSTom Rix 28*8966eb4cSTom Rix #include <common.h> 29*8966eb4cSTom Rix #include <i2c.h> 30*8966eb4cSTom Rix 31*8966eb4cSTom Rix /* I2C chip addresses */ 32*8966eb4cSTom Rix 33*8966eb4cSTom Rix /* USB */ 34*8966eb4cSTom Rix #define TWL4030_CHIP_USB 0x48 35*8966eb4cSTom Rix /* AUD */ 36*8966eb4cSTom Rix #define TWL4030_CHIP_AUDIO_VOICE 0x49 37*8966eb4cSTom Rix #define TWL4030_CHIP_GPIO 0x49 38*8966eb4cSTom Rix #define TWL4030_CHIP_INTBR 0x49 39*8966eb4cSTom Rix #define TWL4030_CHIP_PIH 0x49 40*8966eb4cSTom Rix #define TWL4030_CHIP_TEST 0x49 41*8966eb4cSTom Rix /* AUX */ 42*8966eb4cSTom Rix #define TWL4030_CHIP_KEYPAD 0x4a 43*8966eb4cSTom Rix #define TWL4030_CHIP_MADC 0x4a 44*8966eb4cSTom Rix #define TWL4030_CHIP_INTERRUPTS 0x4a 45*8966eb4cSTom Rix #define TWL4030_CHIP_LED 0x4a 46*8966eb4cSTom Rix #define TWL4030_CHIP_MAIN_CHARGE 0x4a 47*8966eb4cSTom Rix #define TWL4030_CHIP_PRECHARGE 0x4a 48*8966eb4cSTom Rix #define TWL4030_CHIP_PWM0 0x4a 49*8966eb4cSTom Rix #define TWL4030_CHIP_PWM1 0x4a 50*8966eb4cSTom Rix #define TWL4030_CHIP_PWMA 0x4a 51*8966eb4cSTom Rix #define TWL4030_CHIP_PWMB 0x4a 52*8966eb4cSTom Rix /* POWER */ 53*8966eb4cSTom Rix #define TWL4030_CHIP_BACKUP 0x4b 54*8966eb4cSTom Rix #define TWL4030_CHIP_INT 0x4b 55*8966eb4cSTom Rix #define TWL4030_CHIP_PM_MASTER 0x4b 56*8966eb4cSTom Rix #define TWL4030_CHIP_PM_RECEIVER 0x4b 57*8966eb4cSTom Rix #define TWL4030_CHIP_RTC 0x4b 58*8966eb4cSTom Rix #define TWL4030_CHIP_SECURED_REG 0x4b 59*8966eb4cSTom Rix 60*8966eb4cSTom Rix /* Register base addresses */ 61*8966eb4cSTom Rix 62*8966eb4cSTom Rix /* USB */ 63*8966eb4cSTom Rix #define TWL4030_BASEADD_USB 0x0000 64*8966eb4cSTom Rix /* AUD */ 65*8966eb4cSTom Rix #define TWL4030_BASEADD_AUDIO_VOICE 0x0000 66*8966eb4cSTom Rix #define TWL4030_BASEADD_GPIO 0x0098 67*8966eb4cSTom Rix #define TWL4030_BASEADD_INTBR 0x0085 68*8966eb4cSTom Rix #define TWL4030_BASEADD_PIH 0x0080 69*8966eb4cSTom Rix #define TWL4030_BASEADD_TEST 0x004C 70*8966eb4cSTom Rix /* AUX */ 71*8966eb4cSTom Rix #define TWL4030_BASEADD_INTERRUPTS 0x00B9 72*8966eb4cSTom Rix #define TWL4030_BASEADD_LED 0x00EE 73*8966eb4cSTom Rix #define TWL4030_BASEADD_MADC 0x0000 74*8966eb4cSTom Rix #define TWL4030_BASEADD_MAIN_CHARGE 0x0074 75*8966eb4cSTom Rix #define TWL4030_BASEADD_PRECHARGE 0x00AA 76*8966eb4cSTom Rix #define TWL4030_BASEADD_PWM0 0x00F8 77*8966eb4cSTom Rix #define TWL4030_BASEADD_PWM1 0x00FB 78*8966eb4cSTom Rix #define TWL4030_BASEADD_PWMA 0x00EF 79*8966eb4cSTom Rix #define TWL4030_BASEADD_PWMB 0x00F1 80*8966eb4cSTom Rix #define TWL4030_BASEADD_KEYPAD 0x00D2 81*8966eb4cSTom Rix /* POWER */ 82*8966eb4cSTom Rix #define TWL4030_BASEADD_BACKUP 0x0014 83*8966eb4cSTom Rix #define TWL4030_BASEADD_INT 0x002E 84*8966eb4cSTom Rix #define TWL4030_BASEADD_PM_MASTER 0x0036 85*8966eb4cSTom Rix #define TWL4030_BASEADD_PM_RECIEVER 0x005B 86*8966eb4cSTom Rix #define TWL4030_BASEADD_RTC 0x001C 87*8966eb4cSTom Rix #define TWL4030_BASEADD_SECURED_REG 0x0000 88*8966eb4cSTom Rix 89*8966eb4cSTom Rix /* 90*8966eb4cSTom Rix * Power Management Master 91*8966eb4cSTom Rix */ 92*8966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_P1_TRANSITION 0x36 93*8966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_P2_TRANSITION 0x37 94*8966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_P3_TRANSITION 0x38 95*8966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_P123_TRANSITION 0x39 96*8966eb4cSTom Rix #define TWL4030_PM_MASTER_STS_BOOT 0x3A 97*8966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_BOOT 0x3B 98*8966eb4cSTom Rix #define TWL4030_PM_MASTER_SHUNDAN 0x3C 99*8966eb4cSTom Rix #define TWL4030_PM_MASTER_BOOT_BCI 0x3D 100*8966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_PWRANA1 0x3E 101*8966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_PWRANA2 0x3F 102*8966eb4cSTom Rix #define TWL4030_PM_MASTER_BGAP_TRIM 0x40 103*8966eb4cSTom Rix #define TWL4030_PM_MASTER_BACKUP_MISC_STS 0x41 104*8966eb4cSTom Rix #define TWL4030_PM_MASTER_BACKUP_MISC_CFG 0x42 105*8966eb4cSTom Rix #define TWL4030_PM_MASTER_BACKUP_MISC_TST 0x43 106*8966eb4cSTom Rix #define TWL4030_PM_MASTER_PROTECT_KEY 0x44 107*8966eb4cSTom Rix #define TWL4030_PM_MASTER_STS_HW_CONDITIONS 0x45 108*8966eb4cSTom Rix #define TWL4030_PM_MASTER_P1_SW_EVENTS 0x46 109*8966eb4cSTom Rix #define TWL4030_PM_MASTER_P2_SW_EVENTS 0x47 110*8966eb4cSTom Rix #define TWL4030_PM_MASTER_P3_SW_EVENTS 0x48 111*8966eb4cSTom Rix #define TWL4030_PM_MASTER_STS_P123_STATE 0x49 112*8966eb4cSTom Rix #define TWL4030_PM_MASTER_PB_CFG 0x4A 113*8966eb4cSTom Rix #define TWL4030_PM_MASTER_PB_WORD_MSB 0x4B 114*8966eb4cSTom Rix #define TWL4030_PM_MASTER_PB_WORD_LSB 0x4C 115*8966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_W2P 0x52 116*8966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_P2A 0x53 117*8966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_A2W 0x54 118*8966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_A2S 0x55 119*8966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_S2A12 0x56 120*8966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_S2A3 0x57 121*8966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_WARM 0x58 122*8966eb4cSTom Rix #define TWL4030_PM_MASTER_MEMORY_ADDRESS 0x59 123*8966eb4cSTom Rix #define TWL4030_PM_MASTER_MEMORY_DATA 0x5A 124*8966eb4cSTom Rix #define TWL4030_PM_MASTER_SC_CONFIG 0x5B 125*8966eb4cSTom Rix #define TWL4030_PM_MASTER_SC_DETECT1 0x5C 126*8966eb4cSTom Rix #define TWL4030_PM_MASTER_SC_DETECT2 0x5D 127*8966eb4cSTom Rix #define TWL4030_PM_MASTER_WATCHDOG_CFG 0x5E 128*8966eb4cSTom Rix #define TWL4030_PM_MASTER_IT_CHECK_CFG 0x5F 129*8966eb4cSTom Rix #define TWL4030_PM_MASTER_VIBRATOR_CFG 0x60 130*8966eb4cSTom Rix #define TWL4030_PM_MASTER_DCDC_GLOBAL_CFG 0x61 131*8966eb4cSTom Rix #define TWL4030_PM_MASTER_VDD1_TRIM1 0x62 132*8966eb4cSTom Rix #define TWL4030_PM_MASTER_VDD1_TRIM2 0x63 133*8966eb4cSTom Rix #define TWL4030_PM_MASTER_VDD2_TRIM1 0x64 134*8966eb4cSTom Rix #define TWL4030_PM_MASTER_VDD2_TRIM2 0x65 135*8966eb4cSTom Rix #define TWL4030_PM_MASTER_VIO_TRIM1 0x66 136*8966eb4cSTom Rix #define TWL4030_PM_MASTER_VIO_TRIM2 0x67 137*8966eb4cSTom Rix #define TWL4030_PM_MASTER_MISC_CFG 0x68 138*8966eb4cSTom Rix #define TWL4030_PM_MASTER_LS_TST_A 0x69 139*8966eb4cSTom Rix #define TWL4030_PM_MASTER_LS_TST_B 0x6A 140*8966eb4cSTom Rix #define TWL4030_PM_MASTER_LS_TST_C 0x6B 141*8966eb4cSTom Rix #define TWL4030_PM_MASTER_LS_TST_D 0x6C 142*8966eb4cSTom Rix #define TWL4030_PM_MASTER_BB_CFG 0x6D 143*8966eb4cSTom Rix #define TWL4030_PM_MASTER_MISC_TST 0x6E 144*8966eb4cSTom Rix #define TWL4030_PM_MASTER_TRIM1 0x6F 145*8966eb4cSTom Rix /* P[1-3]_SW_EVENTS */ 146*8966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_STOPON_PWRON (1 << 6) 147*8966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_STOPON_SYSEN (1 << 5) 148*8966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_ENABLE_WARMRESET (1 << 4) 149*8966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_LVL_WAKEUP (1 << 3) 150*8966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_DEVACT (1 << 2) 151*8966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_DEVSLP (1 << 1) 152*8966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_DEVOFF (1 << 0) 153*8966eb4cSTom Rix 154*8966eb4cSTom Rix /* Power Managment Receiver */ 155*8966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB1V5_DEV_GRP 0xCC 156*8966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB1V5_TYPE 0xCD 157*8966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB1V5_REMAP 0xCE 158*8966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB1V8_DEV_GRP 0xCF 159*8966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB1V8_TYPE 0xD0 160*8966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB1V8_REMAP 0xD1 161*8966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB3V1_DEV_GRP 0xD2 162*8966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB3V1_TYPE 0xD3 163*8966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB3V1_REMAP 0xD4 164*8966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSBCP_DEV_GRP 0xD5 165*8966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSBCP_DEV_TYPE 0xD6 166*8966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSBCP_DEV_REMAP 0xD7 167*8966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB_DEDICATED1 0xD8 168*8966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB_DEDICATED2 0xD9 169*8966eb4cSTom Rix 170*8966eb4cSTom Rix /* Keypad */ 171*8966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_CTRL_REG 0xD2 172*8966eb4cSTom Rix #define TWL4030_KEYPAD_KEY_DEB_REG 0xD3 173*8966eb4cSTom Rix #define TWL4030_KEYPAD_LONG_KEY_REG1 0xD4 174*8966eb4cSTom Rix #define TWL4030_KEYPAD_LK_PTV_REG 0xD5 175*8966eb4cSTom Rix #define TWL4030_KEYPAD_TIME_OUT_REG1 0xD6 176*8966eb4cSTom Rix #define TWL4030_KEYPAD_TIME_OUT_REG2 0xD7 177*8966eb4cSTom Rix #define TWL4030_KEYPAD_KBC_REG 0xD8 178*8966eb4cSTom Rix #define TWL4030_KEYPAD_KBR_REG 0xD9 179*8966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_SMS 0xDA 180*8966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_7_0 0xDB 181*8966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_15_8 0xDC 182*8966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_23_16 0xDD 183*8966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_31_24 0xDE 184*8966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_39_32 0xDF 185*8966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_47_40 0xE0 186*8966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_55_48 0xE1 187*8966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_63_56 0xE2 188*8966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_ISR1 0xE3 189*8966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_IMR1 0xE4 190*8966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_ISR2 0xE5 191*8966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_IMR2 0xE6 192*8966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_SIR 0xE7 193*8966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_EDR 0xE8 194*8966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_SIH_CTRL 0xE9 195*8966eb4cSTom Rix 196*8966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_KBD_ON (1 << 6) 197*8966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_RP_EN (1 << 5) 198*8966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_TOLE_EN (1 << 4) 199*8966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_TOE_EN (1 << 3) 200*8966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_LK_EN (1 << 2) 201*8966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_SOFTMODEN (1 << 1) 202*8966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_SOFT_NRST (1 << 0) 203*8966eb4cSTom Rix 204*8966eb4cSTom Rix /* USB */ 205*8966eb4cSTom Rix #define TWL4030_USB_FUNC_CTRL (0x04) 206*8966eb4cSTom Rix #define TWL4030_USB_OPMODE_MASK (3 << 3) 207*8966eb4cSTom Rix #define TWL4030_USB_XCVRSELECT_MASK (3 << 0) 208*8966eb4cSTom Rix #define TWL4030_USB_IFC_CTRL (0x07) 209*8966eb4cSTom Rix #define TWL4030_USB_CARKITMODE (1 << 2) 210*8966eb4cSTom Rix #define TWL4030_USB_POWER_CTRL (0xAC) 211*8966eb4cSTom Rix #define TWL4030_USB_OTG_ENAB (1 << 5) 212*8966eb4cSTom Rix #define TWL4030_USB_PHY_PWR_CTRL (0xFD) 213*8966eb4cSTom Rix #define TWL4030_USB_PHYPWD (1 << 0) 214*8966eb4cSTom Rix #define TWL4030_USB_PHY_CLK_CTRL (0xFE) 215*8966eb4cSTom Rix #define TWL4030_USB_CLOCKGATING_EN (1 << 2) 216*8966eb4cSTom Rix #define TWL4030_USB_CLK32K_EN (1 << 1) 217*8966eb4cSTom Rix #define TWL4030_USB_REQ_PHY_DPLL_CLK (1 << 0) 218*8966eb4cSTom Rix #define TWL4030_USB_PHY_CLK_CTRL_STS (0xFF) 219*8966eb4cSTom Rix #define TWL4030_USB_PHY_DPLL_CLK (1 << 0) 220*8966eb4cSTom Rix 221*8966eb4cSTom Rix /* 222*8966eb4cSTom Rix * Convience functions to read and write from TWL4030 223*8966eb4cSTom Rix * 224*8966eb4cSTom Rix * chip_no is the i2c address, it must be one of the chip addresses 225*8966eb4cSTom Rix * defined at the top of this file with the prefix TWL4030_CHIP_ 226*8966eb4cSTom Rix * examples are TWL4030_CHIP_PM_RECEIVER and TWL4030_CHIP_KEYPAD 227*8966eb4cSTom Rix * 228*8966eb4cSTom Rix * val is the data either written to or read from the twl4030 229*8966eb4cSTom Rix * 230*8966eb4cSTom Rix * reg is the register to act on, it must be one of the defines 231*8966eb4cSTom Rix * above and with the format TWL4030_<chip suffix>_<register name> 232*8966eb4cSTom Rix * examples are TWL4030_PM_RECEIVER_VMMC1_DEV_GRP and 233*8966eb4cSTom Rix * TWL4030_LED_LEDEN. 234*8966eb4cSTom Rix */ 235*8966eb4cSTom Rix static inline int twl4030_i2c_write_u8(u8 chip_no, u8 val, u8 reg) 236*8966eb4cSTom Rix { 237*8966eb4cSTom Rix return i2c_write(chip_no, reg, 1, &val, 1); 238*8966eb4cSTom Rix } 239*8966eb4cSTom Rix 240*8966eb4cSTom Rix static inline int twl4030_i2c_read_u8(u8 chip_no, u8 *val, u8 reg) 241*8966eb4cSTom Rix { 242*8966eb4cSTom Rix return i2c_read(chip_no, reg, 1, val, 1); 243*8966eb4cSTom Rix } 244*8966eb4cSTom Rix 245*8966eb4cSTom Rix #endif /* TWL4030_H */ 246