xref: /rk3399_rockchip-uboot/include/spartan2.h (revision c609719b8d1b2dca590e0ed499016d041203e403)
1*c609719bSwdenk /*
2*c609719bSwdenk  * (C) Copyright 2002
3*c609719bSwdenk  * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4*c609719bSwdenk  *
5*c609719bSwdenk  * See file CREDITS for list of people who contributed to this
6*c609719bSwdenk  * project.
7*c609719bSwdenk  *
8*c609719bSwdenk  * This program is free software; you can redistribute it and/or
9*c609719bSwdenk  * modify it under the terms of the GNU General Public License as
10*c609719bSwdenk  * published by the Free Software Foundation; either version 2 of
11*c609719bSwdenk  * the License, or (at your option) any later version.
12*c609719bSwdenk  *
13*c609719bSwdenk  * This program is distributed in the hope that it will be useful,
14*c609719bSwdenk  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15*c609719bSwdenk  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16*c609719bSwdenk  * GNU General Public License for more details.
17*c609719bSwdenk  *
18*c609719bSwdenk  * You should have received a copy of the GNU General Public License
19*c609719bSwdenk  * along with this program; if not, write to the Free Software
20*c609719bSwdenk  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21*c609719bSwdenk  * MA 02111-1307 USA
22*c609719bSwdenk  *
23*c609719bSwdenk  */
24*c609719bSwdenk 
25*c609719bSwdenk #ifndef _SPARTAN2_H_
26*c609719bSwdenk #define _SPARTAN2_H_
27*c609719bSwdenk 
28*c609719bSwdenk #include <xilinx.h>
29*c609719bSwdenk 
30*c609719bSwdenk extern int Spartan2_load( Xilinx_desc *desc, void *image, size_t size );
31*c609719bSwdenk extern int Spartan2_dump( Xilinx_desc *desc, void *buf, size_t bsize );
32*c609719bSwdenk extern int Spartan2_info( Xilinx_desc *desc );
33*c609719bSwdenk extern int Spartan2_reloc( Xilinx_desc *desc, ulong reloc_off );
34*c609719bSwdenk 
35*c609719bSwdenk /* Slave Parallel Implementation function table */
36*c609719bSwdenk typedef struct {
37*c609719bSwdenk 	Xilinx_pre_fn	pre;
38*c609719bSwdenk 	Xilinx_pgm_fn	pgm;
39*c609719bSwdenk 	Xilinx_init_fn	init;
40*c609719bSwdenk 	Xilinx_err_fn	err;
41*c609719bSwdenk 	Xilinx_done_fn	done;
42*c609719bSwdenk 	Xilinx_clk_fn	clk;
43*c609719bSwdenk 	Xilinx_cs_fn	cs;
44*c609719bSwdenk 	Xilinx_wr_fn	wr;
45*c609719bSwdenk 	Xilinx_rdata_fn	rdata;
46*c609719bSwdenk 	Xilinx_wdata_fn	wdata;
47*c609719bSwdenk 	Xilinx_busy_fn	busy;
48*c609719bSwdenk 	Xilinx_abort_fn	abort;
49*c609719bSwdenk 	Xilinx_post_fn	post;
50*c609719bSwdenk 	int           	relocated;
51*c609719bSwdenk } Xilinx_Spartan2_Slave_Parallel_fns;
52*c609719bSwdenk 
53*c609719bSwdenk /* Slave Serial Implementation function table */
54*c609719bSwdenk typedef struct {
55*c609719bSwdenk 	Xilinx_pgm_fn	pgm;
56*c609719bSwdenk 	Xilinx_clk_fn	clk;
57*c609719bSwdenk 	Xilinx_rdata_fn	rdata;
58*c609719bSwdenk 	Xilinx_wdata_fn	wdata;
59*c609719bSwdenk 	int           	relocated;
60*c609719bSwdenk } Xilinx_Spartan2_Slave_Serial_fns;
61*c609719bSwdenk 
62*c609719bSwdenk /* Device Image Sizes
63*c609719bSwdenk  *********************************************************************/
64*c609719bSwdenk /* Spartan-II (2.5V) */
65*c609719bSwdenk #define XILINX_XC2S15_SIZE  	197728/8
66*c609719bSwdenk #define XILINX_XC2S30_SIZE  	336800/8
67*c609719bSwdenk #define XILINX_XC2S50_SIZE  	559232/8
68*c609719bSwdenk #define XILINX_XC2S100_SIZE 	781248/8
69*c609719bSwdenk #define XILINX_XC2S150_SIZE 	1040128/8
70*c609719bSwdenk 
71*c609719bSwdenk /* Descriptor Macros
72*c609719bSwdenk  *********************************************************************/
73*c609719bSwdenk /* Spartan-II devices */
74*c609719bSwdenk #define XILINX_XC2S15_DESC(iface, fn_table, cookie) \
75*c609719bSwdenk { Xilinx_Spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie }
76*c609719bSwdenk 
77*c609719bSwdenk #define XILINX_XC2S30_DESC(iface, fn_table, cookie) \
78*c609719bSwdenk { Xilinx_Spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie }
79*c609719bSwdenk 
80*c609719bSwdenk #define XILINX_XC2S50_DESC(iface, fn_table, cookie) \
81*c609719bSwdenk { Xilinx_Spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie }
82*c609719bSwdenk 
83*c609719bSwdenk #define XILINX_XC2S100_DESC(iface, fn_table, cookie) \
84*c609719bSwdenk { Xilinx_Spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie }
85*c609719bSwdenk 
86*c609719bSwdenk #define XILINX_XC2S150_DESC(iface, fn_table, cookie) \
87*c609719bSwdenk { Xilinx_Spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie }
88*c609719bSwdenk 
89*c609719bSwdenk #endif /* _SPARTAN2_H_ */
90*c609719bSwdenk 
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