xref: /rk3399_rockchip-uboot/include/spartan2.h (revision 2df9d5c431fca07c9868a36b48ee771bde6b19e8)
1c609719bSwdenk /*
2c609719bSwdenk  * (C) Copyright 2002
3c609719bSwdenk  * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4c609719bSwdenk  *
51a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
6c609719bSwdenk  */
7c609719bSwdenk 
8c609719bSwdenk #ifndef _SPARTAN2_H_
9c609719bSwdenk #define _SPARTAN2_H_
10c609719bSwdenk 
11c609719bSwdenk #include <xilinx.h>
12c609719bSwdenk 
13f8c1be98SMichal Simek int spartan2_load(xilinx_desc *desc, const void *image, size_t size);
14f8c1be98SMichal Simek int spartan2_dump(xilinx_desc *desc, const void *buf, size_t bsize);
15f8c1be98SMichal Simek int spartan2_info(xilinx_desc *desc);
16c609719bSwdenk 
17c609719bSwdenk /* Slave Parallel Implementation function table */
18c609719bSwdenk typedef struct {
19*2df9d5c4SMichal Simek 	xilinx_pre_fn	pre;
20*2df9d5c4SMichal Simek 	xilinx_pgm_fn	pgm;
21*2df9d5c4SMichal Simek 	xilinx_init_fn	init;
22*2df9d5c4SMichal Simek 	xilinx_err_fn	err;
23*2df9d5c4SMichal Simek 	xilinx_done_fn	done;
24*2df9d5c4SMichal Simek 	xilinx_clk_fn	clk;
25*2df9d5c4SMichal Simek 	xilinx_cs_fn	cs;
26*2df9d5c4SMichal Simek 	xilinx_wr_fn	wr;
27*2df9d5c4SMichal Simek 	xilinx_rdata_fn	rdata;
28*2df9d5c4SMichal Simek 	xilinx_wdata_fn	wdata;
29*2df9d5c4SMichal Simek 	xilinx_busy_fn	busy;
30*2df9d5c4SMichal Simek 	xilinx_abort_fn	abort;
31*2df9d5c4SMichal Simek 	xilinx_post_fn	post;
32b625b9aeSMichal Simek } xilinx_spartan2_slave_parallel_fns;
33c609719bSwdenk 
34c609719bSwdenk /* Slave Serial Implementation function table */
35c609719bSwdenk typedef struct {
36*2df9d5c4SMichal Simek 	xilinx_pre_fn	pre;
37*2df9d5c4SMichal Simek 	xilinx_pgm_fn	pgm;
38*2df9d5c4SMichal Simek 	xilinx_clk_fn	clk;
39*2df9d5c4SMichal Simek 	xilinx_init_fn	init;
40*2df9d5c4SMichal Simek 	xilinx_done_fn	done;
41*2df9d5c4SMichal Simek 	xilinx_wr_fn	wr;
42*2df9d5c4SMichal Simek 	xilinx_post_fn	post;
43b625b9aeSMichal Simek } xilinx_spartan2_slave_serial_fns;
44c609719bSwdenk 
45c609719bSwdenk /* Device Image Sizes
46c609719bSwdenk  *********************************************************************/
47c609719bSwdenk /* Spartan-II (2.5V) */
48c609719bSwdenk #define XILINX_XC2S15_SIZE	197728/8
49c609719bSwdenk #define XILINX_XC2S30_SIZE	336800/8
50c609719bSwdenk #define XILINX_XC2S50_SIZE	559232/8
51c609719bSwdenk #define XILINX_XC2S100_SIZE	781248/8
52c609719bSwdenk #define XILINX_XC2S150_SIZE	1040128/8
533bff4ffaSMatthias Fuchs #define XILINX_XC2S200_SIZE	1335872/8
54c609719bSwdenk 
559dd611b8Swdenk /* Spartan-IIE (1.8V) */
569dd611b8Swdenk #define XILINX_XC2S50E_SIZE     630048/8
579dd611b8Swdenk #define XILINX_XC2S100E_SIZE    863840/8
589dd611b8Swdenk #define XILINX_XC2S150E_SIZE    1134496/8
599dd611b8Swdenk #define XILINX_XC2S200E_SIZE    1442016/8
609dd611b8Swdenk #define XILINX_XC2S300E_SIZE    1875648/8
619dd611b8Swdenk 
62c609719bSwdenk /* Descriptor Macros
63c609719bSwdenk  *********************************************************************/
64c609719bSwdenk /* Spartan-II devices */
65c609719bSwdenk #define XILINX_XC2S15_DESC(iface, fn_table, cookie) \
66b625b9aeSMichal Simek { xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie }
67c609719bSwdenk 
68c609719bSwdenk #define XILINX_XC2S30_DESC(iface, fn_table, cookie) \
69b625b9aeSMichal Simek { xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie }
70c609719bSwdenk 
71c609719bSwdenk #define XILINX_XC2S50_DESC(iface, fn_table, cookie) \
72b625b9aeSMichal Simek { xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie }
73c609719bSwdenk 
74c609719bSwdenk #define XILINX_XC2S100_DESC(iface, fn_table, cookie) \
75b625b9aeSMichal Simek { xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie }
76c609719bSwdenk 
77c609719bSwdenk #define XILINX_XC2S150_DESC(iface, fn_table, cookie) \
78b625b9aeSMichal Simek { xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie }
79c609719bSwdenk 
803bff4ffaSMatthias Fuchs #define XILINX_XC2S200_DESC(iface, fn_table, cookie) \
81b625b9aeSMichal Simek { xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie }
823bff4ffaSMatthias Fuchs 
839dd611b8Swdenk #define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \
84b625b9aeSMichal Simek { xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie }
859dd611b8Swdenk 
869dd611b8Swdenk #define XILINX_XC2S100E_DESC(iface, fn_table, cookie) \
87b625b9aeSMichal Simek { xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie }
889dd611b8Swdenk 
899dd611b8Swdenk #define XILINX_XC2S150E_DESC(iface, fn_table, cookie) \
90b625b9aeSMichal Simek { xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie }
919dd611b8Swdenk 
929dd611b8Swdenk #define XILINX_XC2S200E_DESC(iface, fn_table, cookie) \
93b625b9aeSMichal Simek { xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie }
949dd611b8Swdenk 
959dd611b8Swdenk #define XILINX_XC2S300E_DESC(iface, fn_table, cookie) \
96b625b9aeSMichal Simek { xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie }
979dd611b8Swdenk 
98c609719bSwdenk #endif /* _SPARTAN2_H_ */
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