xref: /rk3399_rockchip-uboot/include/smsc_sio1007.h (revision 98af34f897a6ef5de253806049d033471b02479f)
1*98af34f8SBin Meng /*
2*98af34f8SBin Meng  * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
3*98af34f8SBin Meng  *
4*98af34f8SBin Meng  * SPDX-License-Identifier:	GPL-2.0+
5*98af34f8SBin Meng  */
6*98af34f8SBin Meng 
7*98af34f8SBin Meng #ifndef _SMSC_SIO1007_H_
8*98af34f8SBin Meng #define _SMSC_SIO1007_H_
9*98af34f8SBin Meng 
10*98af34f8SBin Meng /*
11*98af34f8SBin Meng  * The I/O base address of SIO1007 at power-up is determined by the SYSOPT0
12*98af34f8SBin Meng  * and SYSOPT1 pins at the deasserting edge of PCIRST#. The combination of
13*98af34f8SBin Meng  * SYSOPT0 and SYSOPT1 determines one of the following addresses.
14*98af34f8SBin Meng  */
15*98af34f8SBin Meng #define SIO1007_IOPORT0		0x002e
16*98af34f8SBin Meng #define SIO1007_IOPORT1		0x004e
17*98af34f8SBin Meng #define SIO1007_IOPORT2		0x162e
18*98af34f8SBin Meng #define SIO1007_IOPORT3		0x164e
19*98af34f8SBin Meng 
20*98af34f8SBin Meng /* SIO1007 registers */
21*98af34f8SBin Meng 
22*98af34f8SBin Meng #define DEV_POWER_CTRL		0x02
23*98af34f8SBin Meng #define UART1_POWER_ON		(1 << 3)
24*98af34f8SBin Meng #define UART2_POWER_ON		(1 << 7)
25*98af34f8SBin Meng 
26*98af34f8SBin Meng #define UART1_IOBASE		0x24
27*98af34f8SBin Meng #define UART2_IOBASE		0x25
28*98af34f8SBin Meng #define UART_IRQ		0x28
29*98af34f8SBin Meng 
30*98af34f8SBin Meng #define RTR_IOBASE_HIGH		0x21
31*98af34f8SBin Meng #define RTR_IOBASE_LOW		0x30
32*98af34f8SBin Meng 
33*98af34f8SBin Meng #define GPIO0_DIR		0x31
34*98af34f8SBin Meng #define GPIO1_DIR		0x35
35*98af34f8SBin Meng #define GPIO_DIR_INPUT		0
36*98af34f8SBin Meng #define GPIO_DIR_OUTPUT		1
37*98af34f8SBin Meng 
38*98af34f8SBin Meng #define GPIO0_POL		0x32
39*98af34f8SBin Meng #define GPIO1_POL		0x36
40*98af34f8SBin Meng #define GPIO_POL_NO_INVERT	0
41*98af34f8SBin Meng #define GPIO_POL_INVERT		1
42*98af34f8SBin Meng 
43*98af34f8SBin Meng #define GPIO0_TYPE		0x33
44*98af34f8SBin Meng #define GPIO1_TYPE		0x37
45*98af34f8SBin Meng #define GPIO_TYPE_PUSH_PULL	0
46*98af34f8SBin Meng #define GPIO_TYPE_OPEN_DRAIN	1
47*98af34f8SBin Meng 
48*98af34f8SBin Meng #define DEV_ACTIVATE		0x3a
49*98af34f8SBin Meng #define RTR_EN			(1 << 1)
50*98af34f8SBin Meng 
51*98af34f8SBin Meng /* Runtime register offset */
52*98af34f8SBin Meng 
53*98af34f8SBin Meng #define GPIO0_DATA		0xc
54*98af34f8SBin Meng #define GPIO1_DATA		0xe
55*98af34f8SBin Meng 
56*98af34f8SBin Meng /* Number of serial ports supported */
57*98af34f8SBin Meng #define SIO1007_UART_NUM	2
58*98af34f8SBin Meng 
59*98af34f8SBin Meng /* Number of gpio pins supported */
60*98af34f8SBin Meng #define GPIO_NUM_PER_GROUP	8
61*98af34f8SBin Meng #define GPIO_GROUP_NUM		2
62*98af34f8SBin Meng #define SIO1007_GPIO_NUM	(GPIO_NUM_PER_GROUP * GPIO_GROUP_NUM)
63*98af34f8SBin Meng 
64*98af34f8SBin Meng /**
65*98af34f8SBin Meng  * Configure the I/O port address of the specified serial device and
66*98af34f8SBin Meng  * enable the serial device.
67*98af34f8SBin Meng  *
68*98af34f8SBin Meng  * @port:	SIO1007 I/O port address
69*98af34f8SBin Meng  * @num:	serial device number (0 or 1)
70*98af34f8SBin Meng  * @iobase:	processor I/O port address to assign to this serial device
71*98af34f8SBin Meng  * @irq:	processor IRQ number to assign to this serial device
72*98af34f8SBin Meng  */
73*98af34f8SBin Meng void sio1007_enable_serial(int port, int num, int iobase, int irq);
74*98af34f8SBin Meng 
75*98af34f8SBin Meng /**
76*98af34f8SBin Meng  * Configure the I/O port address of the runtime register block and
77*98af34f8SBin Meng  * enable the address decoding.
78*98af34f8SBin Meng  *
79*98af34f8SBin Meng  * @port:	SIO1007 I/O port address
80*98af34f8SBin Meng  * @iobase:	processor I/O port address to assign to the runtime registers
81*98af34f8SBin Meng  */
82*98af34f8SBin Meng void sio1007_enable_runtime(int port, int iobase);
83*98af34f8SBin Meng 
84*98af34f8SBin Meng /**
85*98af34f8SBin Meng  * Configure the direction/polority/type of a specified GPIO pin
86*98af34f8SBin Meng  *
87*98af34f8SBin Meng  * @port:	SIO1007 I/O port address
88*98af34f8SBin Meng  * @gpio:	GPIO number (0-7 for GP10-GP17, 8-15 for GP30-GP37)
89*98af34f8SBin Meng  * @dir:	GPIO_DIR_INPUT or GPIO_DIR_OUTPUT
90*98af34f8SBin Meng  * @pol:	GPIO_POL_NO_INVERT or GPIO_POL_INVERT
91*98af34f8SBin Meng  * @type:	GPIO_TYPE_PUSH_PULL or GPIO_TYPE_OPEN_DRAIN
92*98af34f8SBin Meng  */
93*98af34f8SBin Meng void sio1007_gpio_config(int port, int gpio, int dir, int pol, int type);
94*98af34f8SBin Meng 
95*98af34f8SBin Meng /**
96*98af34f8SBin Meng  * Get a GPIO pin value.
97*98af34f8SBin Meng  * This will work whether the GPIO is an input or an output.
98*98af34f8SBin Meng  *
99*98af34f8SBin Meng  * @port:	runtime register block I/O port address
100*98af34f8SBin Meng  * @gpio:	GPIO number (0-7 for GP10-GP17, 8-15 for GP30-GP37)
101*98af34f8SBin Meng  * @return:	0 if low, 1 if high, -EINVAL if gpio number is invalid
102*98af34f8SBin Meng  */
103*98af34f8SBin Meng int sio1007_gpio_get_value(int port, int gpio);
104*98af34f8SBin Meng 
105*98af34f8SBin Meng /**
106*98af34f8SBin Meng  * Set a GPIO pin value.
107*98af34f8SBin Meng  * This will only work when the GPIO is configured as an output.
108*98af34f8SBin Meng  *
109*98af34f8SBin Meng  * @port:	runtime register block I/O port address
110*98af34f8SBin Meng  * @gpio:	GPIO number (0-7 for GP10-GP17, 8-15 for GP30-GP37)
111*98af34f8SBin Meng  * @val:	0 if low, 1 if high
112*98af34f8SBin Meng  */
113*98af34f8SBin Meng void sio1007_gpio_set_value(int port, int gpio, int val);
114*98af34f8SBin Meng 
115*98af34f8SBin Meng #endif /* _SMSC_SIO1007_H_ */
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