xref: /rk3399_rockchip-uboot/include/scmi_protocols.h (revision 7c4b6f223c370d11c12d314111186b35e650119a)
1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3  * Copyright (c) 2015-2019, Arm Limited and Contributors. All rights reserved.
4  * Copyright (C) 2019-2020, Linaro Limited
5  */
6 #ifndef _SCMI_PROTOCOLS_H
7 #define _SCMI_PROTOCOLS_H
8 
9 #include <linux/bitops.h>
10 #include <asm/types.h>
11 
12 /*
13  * Subset the SCMI protocols definition
14  * based on SCMI specification v2.0 (DEN0056B)
15  * https://developer.arm.com/docs/den0056/b
16  */
17 
18 enum scmi_std_protocol {
19 	SCMI_PROTOCOL_ID_BASE = 0x10,
20 	SCMI_PROTOCOL_ID_POWER_DOMAIN = 0x11,
21 	SCMI_PROTOCOL_ID_SYSTEM = 0x12,
22 	SCMI_PROTOCOL_ID_PERF = 0x13,
23 	SCMI_PROTOCOL_ID_CLOCK = 0x14,
24 	SCMI_PROTOCOL_ID_SENSOR = 0x15,
25 	SCMI_PROTOCOL_ID_RESET_DOMAIN = 0x16,
26 };
27 
28 enum scmi_status_code {
29 	SCMI_SUCCESS =  0,
30 	SCMI_NOT_SUPPORTED = -1,
31 	SCMI_INVALID_PARAMETERS = -2,
32 	SCMI_DENIED = -3,
33 	SCMI_NOT_FOUND = -4,
34 	SCMI_OUT_OF_RANGE = -5,
35 	SCMI_BUSY = -6,
36 	SCMI_COMMS_ERROR = -7,
37 	SCMI_GENERIC_ERROR = -8,
38 	SCMI_HARDWARE_ERROR = -9,
39 	SCMI_PROTOCOL_ERROR = -10,
40 };
41 
42 /*
43  * SCMI Clock Protocol
44  */
45 
46 enum scmi_clock_message_id {
47 	SCMI_CLOCK_RATE_SET = 0x5,
48 	SCMI_CLOCK_RATE_GET = 0x6,
49 	SCMI_CLOCK_CONFIG_SET = 0x7,
50 };
51 
52 #define SCMI_CLK_RATE_ASYNC_NOTIFY	BIT(0)
53 #define SCMI_CLK_RATE_ASYNC_NORESP	(BIT(0) | BIT(1))
54 #define SCMI_CLK_RATE_ROUND_DOWN	0
55 #define SCMI_CLK_RATE_ROUND_UP		BIT(2)
56 #define SCMI_CLK_RATE_ROUND_CLOSEST	BIT(3)
57 
58 /**
59  * struct scmi_clk_state_in - Message payload for CLOCK_CONFIG_SET command
60  * @clock_id:	SCMI clock ID
61  * @attributes:	Attributes of the targets clock state
62  */
63 struct scmi_clk_state_in {
64 	u32 clock_id;
65 	u32 attributes;
66 };
67 
68 /**
69  * struct scmi_clk_state_out - Response payload for CLOCK_CONFIG_SET command
70  * @status:	SCMI command status
71  */
72 struct scmi_clk_state_out {
73 	s32 status;
74 };
75 
76 /**
77  * struct scmi_clk_state_in - Message payload for CLOCK_RATE_GET command
78  * @clock_id:	SCMI clock ID
79  * @attributes:	Attributes of the targets clock state
80  */
81 struct scmi_clk_rate_get_in {
82 	u32 clock_id;
83 };
84 
85 /**
86  * struct scmi_clk_rate_get_out - Response payload for CLOCK_RATE_GET command
87  * @status:	SCMI command status
88  * @rate_lsb:	32bit LSB of the clock rate in Hertz
89  * @rate_msb:	32bit MSB of the clock rate in Hertz
90  */
91 struct scmi_clk_rate_get_out {
92 	s32 status;
93 	u32 rate_lsb;
94 	u32 rate_msb;
95 };
96 
97 /**
98  * struct scmi_clk_state_in - Message payload for CLOCK_RATE_SET command
99  * @clock_id:	SCMI clock ID
100  * @flags:	Flags for the clock rate set request
101  * @rate_lsb:	32bit LSB of the clock rate in Hertz
102  * @rate_msb:	32bit MSB of the clock rate in Hertz
103  */
104 struct scmi_clk_rate_set_in {
105 	u32 clock_id;
106 	u32 flags;
107 	u32 rate_lsb;
108 	u32 rate_msb;
109 };
110 
111 /**
112  * struct scmi_clk_rate_set_out - Response payload for CLOCK_RATE_SET command
113  * @status:	SCMI command status
114  */
115 struct scmi_clk_rate_set_out {
116 	s32 status;
117 };
118 
119 #endif /* _SCMI_PROTOCOLS_H */
120