xref: /rk3399_rockchip-uboot/include/scmi_protocols.h (revision f0f5d8434c26534697879fc218c0b790134afa27)
11afcdfc6SEtienne Carriere /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
21afcdfc6SEtienne Carriere /*
31afcdfc6SEtienne Carriere  * Copyright (c) 2015-2019, Arm Limited and Contributors. All rights reserved.
41afcdfc6SEtienne Carriere  * Copyright (C) 2019-2020, Linaro Limited
51afcdfc6SEtienne Carriere  */
61afcdfc6SEtienne Carriere #ifndef _SCMI_PROTOCOLS_H
71afcdfc6SEtienne Carriere #define _SCMI_PROTOCOLS_H
81afcdfc6SEtienne Carriere 
91afcdfc6SEtienne Carriere #include <linux/bitops.h>
107c4b6f22SEtienne Carriere #include <asm/types.h>
111afcdfc6SEtienne Carriere 
121afcdfc6SEtienne Carriere /*
131afcdfc6SEtienne Carriere  * Subset the SCMI protocols definition
141afcdfc6SEtienne Carriere  * based on SCMI specification v2.0 (DEN0056B)
151afcdfc6SEtienne Carriere  * https://developer.arm.com/docs/den0056/b
161afcdfc6SEtienne Carriere  */
171afcdfc6SEtienne Carriere 
181afcdfc6SEtienne Carriere enum scmi_std_protocol {
191afcdfc6SEtienne Carriere 	SCMI_PROTOCOL_ID_BASE = 0x10,
201afcdfc6SEtienne Carriere 	SCMI_PROTOCOL_ID_POWER_DOMAIN = 0x11,
211afcdfc6SEtienne Carriere 	SCMI_PROTOCOL_ID_SYSTEM = 0x12,
221afcdfc6SEtienne Carriere 	SCMI_PROTOCOL_ID_PERF = 0x13,
231afcdfc6SEtienne Carriere 	SCMI_PROTOCOL_ID_CLOCK = 0x14,
241afcdfc6SEtienne Carriere 	SCMI_PROTOCOL_ID_SENSOR = 0x15,
251afcdfc6SEtienne Carriere 	SCMI_PROTOCOL_ID_RESET_DOMAIN = 0x16,
261afcdfc6SEtienne Carriere };
271afcdfc6SEtienne Carriere 
281afcdfc6SEtienne Carriere enum scmi_status_code {
291afcdfc6SEtienne Carriere 	SCMI_SUCCESS =  0,
301afcdfc6SEtienne Carriere 	SCMI_NOT_SUPPORTED = -1,
311afcdfc6SEtienne Carriere 	SCMI_INVALID_PARAMETERS = -2,
321afcdfc6SEtienne Carriere 	SCMI_DENIED = -3,
331afcdfc6SEtienne Carriere 	SCMI_NOT_FOUND = -4,
341afcdfc6SEtienne Carriere 	SCMI_OUT_OF_RANGE = -5,
351afcdfc6SEtienne Carriere 	SCMI_BUSY = -6,
361afcdfc6SEtienne Carriere 	SCMI_COMMS_ERROR = -7,
371afcdfc6SEtienne Carriere 	SCMI_GENERIC_ERROR = -8,
381afcdfc6SEtienne Carriere 	SCMI_HARDWARE_ERROR = -9,
391afcdfc6SEtienne Carriere 	SCMI_PROTOCOL_ERROR = -10,
401afcdfc6SEtienne Carriere };
411afcdfc6SEtienne Carriere 
427c4b6f22SEtienne Carriere /*
437c4b6f22SEtienne Carriere  * SCMI Clock Protocol
447c4b6f22SEtienne Carriere  */
457c4b6f22SEtienne Carriere 
467c4b6f22SEtienne Carriere enum scmi_clock_message_id {
477c4b6f22SEtienne Carriere 	SCMI_CLOCK_RATE_SET = 0x5,
487c4b6f22SEtienne Carriere 	SCMI_CLOCK_RATE_GET = 0x6,
497c4b6f22SEtienne Carriere 	SCMI_CLOCK_CONFIG_SET = 0x7,
507c4b6f22SEtienne Carriere };
517c4b6f22SEtienne Carriere 
527c4b6f22SEtienne Carriere #define SCMI_CLK_RATE_ASYNC_NOTIFY	BIT(0)
537c4b6f22SEtienne Carriere #define SCMI_CLK_RATE_ASYNC_NORESP	(BIT(0) | BIT(1))
547c4b6f22SEtienne Carriere #define SCMI_CLK_RATE_ROUND_DOWN	0
557c4b6f22SEtienne Carriere #define SCMI_CLK_RATE_ROUND_UP		BIT(2)
567c4b6f22SEtienne Carriere #define SCMI_CLK_RATE_ROUND_CLOSEST	BIT(3)
577c4b6f22SEtienne Carriere 
587c4b6f22SEtienne Carriere /**
597c4b6f22SEtienne Carriere  * struct scmi_clk_state_in - Message payload for CLOCK_CONFIG_SET command
607c4b6f22SEtienne Carriere  * @clock_id:	SCMI clock ID
617c4b6f22SEtienne Carriere  * @attributes:	Attributes of the targets clock state
627c4b6f22SEtienne Carriere  */
637c4b6f22SEtienne Carriere struct scmi_clk_state_in {
647c4b6f22SEtienne Carriere 	u32 clock_id;
657c4b6f22SEtienne Carriere 	u32 attributes;
667c4b6f22SEtienne Carriere };
677c4b6f22SEtienne Carriere 
687c4b6f22SEtienne Carriere /**
697c4b6f22SEtienne Carriere  * struct scmi_clk_state_out - Response payload for CLOCK_CONFIG_SET command
707c4b6f22SEtienne Carriere  * @status:	SCMI command status
717c4b6f22SEtienne Carriere  */
727c4b6f22SEtienne Carriere struct scmi_clk_state_out {
737c4b6f22SEtienne Carriere 	s32 status;
747c4b6f22SEtienne Carriere };
757c4b6f22SEtienne Carriere 
767c4b6f22SEtienne Carriere /**
777c4b6f22SEtienne Carriere  * struct scmi_clk_state_in - Message payload for CLOCK_RATE_GET command
787c4b6f22SEtienne Carriere  * @clock_id:	SCMI clock ID
797c4b6f22SEtienne Carriere  * @attributes:	Attributes of the targets clock state
807c4b6f22SEtienne Carriere  */
817c4b6f22SEtienne Carriere struct scmi_clk_rate_get_in {
827c4b6f22SEtienne Carriere 	u32 clock_id;
837c4b6f22SEtienne Carriere };
847c4b6f22SEtienne Carriere 
857c4b6f22SEtienne Carriere /**
867c4b6f22SEtienne Carriere  * struct scmi_clk_rate_get_out - Response payload for CLOCK_RATE_GET command
877c4b6f22SEtienne Carriere  * @status:	SCMI command status
887c4b6f22SEtienne Carriere  * @rate_lsb:	32bit LSB of the clock rate in Hertz
897c4b6f22SEtienne Carriere  * @rate_msb:	32bit MSB of the clock rate in Hertz
907c4b6f22SEtienne Carriere  */
917c4b6f22SEtienne Carriere struct scmi_clk_rate_get_out {
927c4b6f22SEtienne Carriere 	s32 status;
937c4b6f22SEtienne Carriere 	u32 rate_lsb;
947c4b6f22SEtienne Carriere 	u32 rate_msb;
957c4b6f22SEtienne Carriere };
967c4b6f22SEtienne Carriere 
977c4b6f22SEtienne Carriere /**
987c4b6f22SEtienne Carriere  * struct scmi_clk_state_in - Message payload for CLOCK_RATE_SET command
997c4b6f22SEtienne Carriere  * @clock_id:	SCMI clock ID
1007c4b6f22SEtienne Carriere  * @flags:	Flags for the clock rate set request
1017c4b6f22SEtienne Carriere  * @rate_lsb:	32bit LSB of the clock rate in Hertz
1027c4b6f22SEtienne Carriere  * @rate_msb:	32bit MSB of the clock rate in Hertz
1037c4b6f22SEtienne Carriere  */
1047c4b6f22SEtienne Carriere struct scmi_clk_rate_set_in {
1057c4b6f22SEtienne Carriere 	u32 flags;
106*f0f5d843SXiaoDong Huang 	u32 clock_id;
1077c4b6f22SEtienne Carriere 	u32 rate_lsb;
1087c4b6f22SEtienne Carriere 	u32 rate_msb;
1097c4b6f22SEtienne Carriere };
1107c4b6f22SEtienne Carriere 
1117c4b6f22SEtienne Carriere /**
1127c4b6f22SEtienne Carriere  * struct scmi_clk_rate_set_out - Response payload for CLOCK_RATE_SET command
1137c4b6f22SEtienne Carriere  * @status:	SCMI command status
1147c4b6f22SEtienne Carriere  */
1157c4b6f22SEtienne Carriere struct scmi_clk_rate_set_out {
1167c4b6f22SEtienne Carriere 	s32 status;
1177c4b6f22SEtienne Carriere };
1187c4b6f22SEtienne Carriere 
1193cdb50e6SEtienne Carriere /*
1203cdb50e6SEtienne Carriere  * SCMI Reset Domain Protocol
1213cdb50e6SEtienne Carriere  */
1223cdb50e6SEtienne Carriere 
1233cdb50e6SEtienne Carriere enum scmi_reset_domain_message_id {
1243cdb50e6SEtienne Carriere 	SCMI_RESET_DOMAIN_ATTRIBUTES = 0x3,
1253cdb50e6SEtienne Carriere 	SCMI_RESET_DOMAIN_RESET = 0x4,
1263cdb50e6SEtienne Carriere };
1273cdb50e6SEtienne Carriere 
1283cdb50e6SEtienne Carriere #define SCMI_RD_NAME_LEN		16
1293cdb50e6SEtienne Carriere 
1303cdb50e6SEtienne Carriere #define SCMI_RD_ATTRIBUTES_FLAG_ASYNC	BIT(31)
1313cdb50e6SEtienne Carriere #define SCMI_RD_ATTRIBUTES_FLAG_NOTIF	BIT(30)
1323cdb50e6SEtienne Carriere 
1333cdb50e6SEtienne Carriere #define SCMI_RD_RESET_FLAG_ASYNC	BIT(2)
1343cdb50e6SEtienne Carriere #define SCMI_RD_RESET_FLAG_ASSERT	BIT(1)
1353cdb50e6SEtienne Carriere #define SCMI_RD_RESET_FLAG_CYCLE	BIT(0)
1363cdb50e6SEtienne Carriere 
1373cdb50e6SEtienne Carriere /**
1383cdb50e6SEtienne Carriere  * struct scmi_rd_attr_in - Payload for RESET_DOMAIN_ATTRIBUTES message
1393cdb50e6SEtienne Carriere  * @domain_id:	SCMI reset domain ID
1403cdb50e6SEtienne Carriere  */
1413cdb50e6SEtienne Carriere struct scmi_rd_attr_in {
1423cdb50e6SEtienne Carriere 	u32 domain_id;
1433cdb50e6SEtienne Carriere };
1443cdb50e6SEtienne Carriere 
1453cdb50e6SEtienne Carriere /**
1463cdb50e6SEtienne Carriere  * struct scmi_rd_attr_out - Payload for RESET_DOMAIN_ATTRIBUTES response
1473cdb50e6SEtienne Carriere  * @status:	SCMI command status
1483cdb50e6SEtienne Carriere  * @attributes:	Retrieved attributes of the reset domain
1493cdb50e6SEtienne Carriere  * @latency:	Reset cycle max lantency
1503cdb50e6SEtienne Carriere  * @name:	Reset domain name
1513cdb50e6SEtienne Carriere  */
1523cdb50e6SEtienne Carriere struct scmi_rd_attr_out {
1533cdb50e6SEtienne Carriere 	s32 status;
1543cdb50e6SEtienne Carriere 	u32 attributes;
1553cdb50e6SEtienne Carriere 	u32 latency;
1563cdb50e6SEtienne Carriere 	char name[SCMI_RD_NAME_LEN];
1573cdb50e6SEtienne Carriere };
1583cdb50e6SEtienne Carriere 
1593cdb50e6SEtienne Carriere /**
1603cdb50e6SEtienne Carriere  * struct scmi_rd_reset_in - Message payload for RESET command
1613cdb50e6SEtienne Carriere  * @domain_id:		SCMI reset domain ID
1623cdb50e6SEtienne Carriere  * @flags:		Flags for the reset request
1633cdb50e6SEtienne Carriere  * @reset_state:	Reset target state
1643cdb50e6SEtienne Carriere  */
1653cdb50e6SEtienne Carriere struct scmi_rd_reset_in {
1663cdb50e6SEtienne Carriere 	u32 domain_id;
1673cdb50e6SEtienne Carriere 	u32 flags;
1683cdb50e6SEtienne Carriere 	u32 reset_state;
1693cdb50e6SEtienne Carriere };
1703cdb50e6SEtienne Carriere 
1713cdb50e6SEtienne Carriere /**
1723cdb50e6SEtienne Carriere  * struct scmi_rd_reset_out - Response payload for RESET command
1733cdb50e6SEtienne Carriere  * @status:	SCMI command status
1743cdb50e6SEtienne Carriere  */
1753cdb50e6SEtienne Carriere struct scmi_rd_reset_out {
1763cdb50e6SEtienne Carriere 	s32 status;
1773cdb50e6SEtienne Carriere };
1783cdb50e6SEtienne Carriere 
1791afcdfc6SEtienne Carriere #endif /* _SCMI_PROTOCOLS_H */
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