1*02b4cf42SLin Jinhan // SPDX-License-Identifier: GPL-2.0 2*02b4cf42SLin Jinhan /* 3*02b4cf42SLin Jinhan * Copyright (c) 2024 Rockchip Electronics Co., Ltd 4*02b4cf42SLin Jinhan */ 5*02b4cf42SLin Jinhan 6*02b4cf42SLin Jinhan #ifndef _ROCKCHIP_CRYPTO_ECC_H_ 7*02b4cf42SLin Jinhan #define _ROCKCHIP_CRYPTO_ECC_H_ 8*02b4cf42SLin Jinhan 9*02b4cf42SLin Jinhan #include <asm/io.h> 10*02b4cf42SLin Jinhan #include <common.h> 11*02b4cf42SLin Jinhan #include <rockchip/crypto_v2.h> 12*02b4cf42SLin Jinhan #include <rockchip/crypto_v2_util.h> 13*02b4cf42SLin Jinhan 14*02b4cf42SLin Jinhan #define SM2_RAM_BASE ((crypto_base) + 0x1000) 15*02b4cf42SLin Jinhan 16*02b4cf42SLin Jinhan #define _SBF(s, v) ((v) << (s)) 17*02b4cf42SLin Jinhan #define _BIT(b) _SBF(b, 1) 18*02b4cf42SLin Jinhan 19*02b4cf42SLin Jinhan #define RK_ECP_MAX_BITS 256 20*02b4cf42SLin Jinhan #define RK_ECP_MAX_BYTES ((RK_ECP_MAX_BITS) / 8) 21*02b4cf42SLin Jinhan #define RK_ECP_MAX_WORDS ((RK_ECP_MAX_BITS) / 32) 22*02b4cf42SLin Jinhan #define RK_ECP_MAX_WORDS_ALL (512 / 32) 23*02b4cf42SLin Jinhan 24*02b4cf42SLin Jinhan #define RK_ECC_CTL 0x03F0 25*02b4cf42SLin Jinhan #define RK_ECC_CTL_RAND_K_SRC_SOFT _SBF(12, 0) 26*02b4cf42SLin Jinhan #define RK_ECC_CTL_RAND_K_SRC_HARD _SBF(12, 1) 27*02b4cf42SLin Jinhan #define RK_ECC_CTL_FUNC_SM2_CURVER _SBF(8, 0x0) 28*02b4cf42SLin Jinhan #define RK_ECC_CTL_FUNC_ECC_CURVER _SBF(8, 0x1) 29*02b4cf42SLin Jinhan 30*02b4cf42SLin Jinhan #define RK_ECC_CTL_FUNC_SEL_MUL _SBF(4, 0x0) 31*02b4cf42SLin Jinhan #define RK_ECC_CTL_FUNC_SEL_KG _SBF(4, 0x1) 32*02b4cf42SLin Jinhan #define RK_ECC_CTL_FUNC_SEL_SIGN _SBF(4, 0x2) 33*02b4cf42SLin Jinhan #define RK_ECC_CTL_FUNC_SEL_VERIFY _SBF(4, 0x3) 34*02b4cf42SLin Jinhan #define RK_ECC_CTL_FUNC_SEL_MUL_MOD _SBF(4, 0x4) 35*02b4cf42SLin Jinhan #define RK_ECC_CTL_FUNC_SEL_ADD_MOD _SBF(4, 0x5) 36*02b4cf42SLin Jinhan #define RK_ECC_CTL_FUNC_SEL_DOUBLE_POINT _SBF(4, 0x6) 37*02b4cf42SLin Jinhan #define RK_ECC_CTL_FUNC_SEL_ADD_POINT _SBF(4, 0x7) 38*02b4cf42SLin Jinhan #define RK_ECC_CTL_FUNC_SEL_KP _SBF(4, 0x8) 39*02b4cf42SLin Jinhan #define RK_ECC_CTL_FUNC_SEL_KP_KG _SBF(4, 0xa) 40*02b4cf42SLin Jinhan #define RK_ECC_CTL_REQ_ECC _SBF(0, 1) 41*02b4cf42SLin Jinhan 42*02b4cf42SLin Jinhan #define RK_ECC_INT_EN 0x03F4 43*02b4cf42SLin Jinhan #define RK_ECC_INT_EN_DONE _BIT(0) 44*02b4cf42SLin Jinhan 45*02b4cf42SLin Jinhan #define RK_ECC_INT_ST 0x03F8 46*02b4cf42SLin Jinhan #define RK_ECC_INT_ST_DONE _BIT(0) 47*02b4cf42SLin Jinhan 48*02b4cf42SLin Jinhan #define RK_ECC_ABN_ST 0x03FC 49*02b4cf42SLin Jinhan #define RK_ECC_ABN_ST_BAD_INV_OUT _BIT(8) 50*02b4cf42SLin Jinhan #define RK_ECC_ABN_ST_BAD_K_IN _BIT(7) 51*02b4cf42SLin Jinhan #define RK_ECC_ABN_ST_BAD_R_IN _BIT(6) 52*02b4cf42SLin Jinhan #define RK_ECC_ABN_ST_BAD_S_IN _BIT(5) 53*02b4cf42SLin Jinhan #define RK_ECC_ABN_ST_BAD_R_K_MID _BIT(4) 54*02b4cf42SLin Jinhan #define RK_ECC_ABN_ST_BAD_R_OUT _BIT(3) 55*02b4cf42SLin Jinhan #define RK_ECC_ABN_ST_BAD_S_OUT _BIT(2) 56*02b4cf42SLin Jinhan #define RK_ECC_ABN_ST_BAD_T_OUT _BIT(1) 57*02b4cf42SLin Jinhan #define RK_ECC_ABN_ST_BAD_POINT_OUT _BIT(0) 58*02b4cf42SLin Jinhan 59*02b4cf42SLin Jinhan #define RK_ECC_CURVE_WIDE 0x0400 60*02b4cf42SLin Jinhan #define RK_ECC_CURVE_WIDE_192 192 61*02b4cf42SLin Jinhan #define RK_ECC_CURVE_WIDE_224 224 62*02b4cf42SLin Jinhan #define RK_ECC_CURVE_WIDE_256 256 63*02b4cf42SLin Jinhan 64*02b4cf42SLin Jinhan #define RK_ECC_MAX_CURVE_WIDE 0x0404 65*02b4cf42SLin Jinhan 66*02b4cf42SLin Jinhan #define RK_ECC_DATA_ENDIAN 0x0408 67*02b4cf42SLin Jinhan #define RK_ECC_DATA_ENDIAN_LITTLE 0x0 68*02b4cf42SLin Jinhan #define RK_ECC_DATA_ENDIAN_BIG 0x1 69*02b4cf42SLin Jinhan 70*02b4cf42SLin Jinhan #define RK_ECC_RAM_CTL 0x0480 71*02b4cf42SLin Jinhan #define RK_ECC_RAM_CTL_SEL_MASK _SBF(16, 3) 72*02b4cf42SLin Jinhan #define RK_ECC_RAM_CTL_CPU _SBF(0, 0) 73*02b4cf42SLin Jinhan #define RK_ECC_RAM_CTL_PKA _SBF(0, 1) 74*02b4cf42SLin Jinhan #define RK_ECC_RAM_CTL_ECC _SBF(0, 2) 75*02b4cf42SLin Jinhan 76*02b4cf42SLin Jinhan 77*02b4cf42SLin Jinhan struct rk_ecp_point { 78*02b4cf42SLin Jinhan struct mpa_num *x; /*!< the point's X coordinate */ 79*02b4cf42SLin Jinhan struct mpa_num *y; /*!< the point's Y coordinate */ 80*02b4cf42SLin Jinhan }; 81*02b4cf42SLin Jinhan 82*02b4cf42SLin Jinhan enum rk_ecp_group_id { 83*02b4cf42SLin Jinhan RK_ECP_DP_NONE = 0, 84*02b4cf42SLin Jinhan RK_ECP_DP_SECP192R1, /*!< 192-bits NIST curve */ 85*02b4cf42SLin Jinhan RK_ECP_DP_SECP224R1, /*!< 224-bits NIST curve */ 86*02b4cf42SLin Jinhan RK_ECP_DP_SECP256R1, /*!< 256-bits NIST curve */ 87*02b4cf42SLin Jinhan RK_ECP_DP_SM2P256V1, /*!< */ 88*02b4cf42SLin Jinhan }; 89*02b4cf42SLin Jinhan 90*02b4cf42SLin Jinhan struct rk_ecp_group { 91*02b4cf42SLin Jinhan enum rk_ecp_group_id id; /*!< internal group identifier */ 92*02b4cf42SLin Jinhan const char *curve_name; 93*02b4cf42SLin Jinhan uint32_t wide; 94*02b4cf42SLin Jinhan const uint8_t *p; /*!< prime modulus of the base field */ 95*02b4cf42SLin Jinhan const uint8_t *a; /*!< 1. A in the equation, or 2. (A + 2) / 4 */ 96*02b4cf42SLin Jinhan const uint8_t *n; 97*02b4cf42SLin Jinhan const uint8_t *gx; 98*02b4cf42SLin Jinhan const uint8_t *gy; 99*02b4cf42SLin Jinhan size_t p_len; 100*02b4cf42SLin Jinhan size_t a_len; 101*02b4cf42SLin Jinhan size_t n_len; 102*02b4cf42SLin Jinhan size_t gx_len; 103*02b4cf42SLin Jinhan size_t gy_len; 104*02b4cf42SLin Jinhan }; 105*02b4cf42SLin Jinhan 106*02b4cf42SLin Jinhan struct rk_ecc_verify { 107*02b4cf42SLin Jinhan uint32_t e[RK_ECP_MAX_WORDS_ALL]; // 0x00 108*02b4cf42SLin Jinhan uint32_t r_[RK_ECP_MAX_WORDS_ALL]; // 0x40 109*02b4cf42SLin Jinhan uint32_t s_[RK_ECP_MAX_WORDS_ALL]; // 0x80 110*02b4cf42SLin Jinhan uint32_t p_x[RK_ECP_MAX_WORDS_ALL]; // 0xC0 111*02b4cf42SLin Jinhan uint32_t p_y[RK_ECP_MAX_WORDS_ALL]; // 0x100 112*02b4cf42SLin Jinhan uint32_t A[RK_ECP_MAX_WORDS_ALL]; // 0x140 113*02b4cf42SLin Jinhan uint32_t P[RK_ECP_MAX_WORDS_ALL]; // 0x180 114*02b4cf42SLin Jinhan uint32_t N[RK_ECP_MAX_WORDS_ALL]; // 0x1C0 115*02b4cf42SLin Jinhan uint32_t G_x[RK_ECP_MAX_WORDS_ALL]; // 0x200 116*02b4cf42SLin Jinhan uint32_t G_y[RK_ECP_MAX_WORDS_ALL]; // 0x240 117*02b4cf42SLin Jinhan uint32_t r[RK_ECP_MAX_WORDS_ALL]; // 0x280 118*02b4cf42SLin Jinhan uint32_t v[RK_ECP_MAX_WORDS_ALL]; // 0x2C0 119*02b4cf42SLin Jinhan }; 120*02b4cf42SLin Jinhan 121*02b4cf42SLin Jinhan int rockchip_ecc_verify(uint32_t crypto_algo, uint8_t *hash, uint32_t hash_len, 122*02b4cf42SLin Jinhan struct rk_ecp_point *point_P, struct rk_ecp_point *point_sign); 123*02b4cf42SLin Jinhan #endif 124