1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2019 Rockchip Electronics Co., Ltd 4 */ 5 6 #ifndef _ROCKCHIP_OTP_H_ 7 #define _ROCKCHIP_OTP_H_ 8 9 /* OTP Register Offsets */ 10 #define OTPC_SBPI_CTRL 0x0020 11 #define OTPC_SBPI_CMD_VALID_PRE 0x0024 12 #define OTPC_SBPI_CS_VALID_PRE 0x0028 13 #define OTPC_SBPI_STATUS 0x002C 14 #define OTPC_USER_CTRL 0x0100 15 #define OTPC_USER_ADDR 0x0104 16 #define OTPC_USER_ENABLE 0x0108 17 #define OTPC_USER_QP 0x0120 18 #define OTPC_USER_Q 0x0124 19 #define OTPC_INT_STATUS 0x0304 20 #define OTPC_SBPI_CMD0_OFFSET 0x1000 21 #define OTPC_SBPI_CMD1_OFFSET 0x1004 22 23 /* OTP Register bits and masks */ 24 #define OTPC_USER_ADDR_MASK GENMASK(31, 16) 25 #define OTPC_USE_USER BIT(0) 26 #define OTPC_USE_USER_MASK GENMASK(16, 16) 27 #define OTPC_USER_FSM_ENABLE BIT(0) 28 #define OTPC_USER_FSM_ENABLE_MASK GENMASK(16, 16) 29 #define OTPC_SBPI_DONE BIT(1) 30 #define OTPC_USER_DONE BIT(2) 31 32 #define SBPI_DAP_ADDR 0x02 33 #define SBPI_DAP_ADDR_SHIFT 8 34 #define SBPI_DAP_ADDR_MASK GENMASK(31, 24) 35 #define SBPI_CMD_VALID_MASK GENMASK(31, 16) 36 #define SBPI_DAP_CMD_WRF 0xC0 37 #define SBPI_DAP_REG_ECC 0x3A 38 #define SBPI_ECC_ENABLE 0x00 39 #define SBPI_ECC_DISABLE 0x09 40 #define SBPI_ENABLE BIT(0) 41 #define SBPI_ENABLE_MASK GENMASK(16, 16) 42 43 #define OTPC_TIMEOUT 10000 44 45 #define OTPC_MODE_CTRL 0x2000 46 #define OTPC_IRQ_ST 0x2008 47 #define OTPC_ACCESS_ADDR 0x200c 48 #define OTPC_RD_DATA 0x2010 49 #define OTPC_REPR_RD_TRANS_NUM 0x2020 50 #define OTPC_DEEP_STANDBY 0x0 51 #define OTPC_STANDBY 0x1 52 #define OTPC_ACTIVE 0x2 53 #define OTPC_READ_ACCESS 0x3 54 #define OTPC_TRANS_NUM 0x1 55 #define OTPC_RDM_IRQ_ST BIT(0) 56 #define OTPC_STB2ACT_IRQ_ST BIT(7) 57 #define OTPC_DP2STB_IRQ_ST BIT(8) 58 #define OTPC_ACT2STB_IRQ_ST BIT(9) 59 #define OTPC_STB2DP_IRQ_ST BIT(10) 60 #define RK3308BS_NBYTES 4 61 #define RK3308BS_MAX_BYTES 0x80 62 #define RK3308BS_NO_SECURE_OFFSET 224 63 64 #define RK3568_NBYTES 2 65 66 #define RV1126_OTP_NVM_CEB 0x00 67 #define RV1126_OTP_NVM_RSTB 0x04 68 #define RV1126_OTP_NVM_ST 0x18 69 #define RV1126_OTP_NVM_RADDR 0x1C 70 #define RV1126_OTP_NVM_RSTART 0x20 71 #define RV1126_OTP_NVM_RDATA 0x24 72 #define RV1126_OTP_NVM_TRWH 0x28 73 #define RV1126_OTP_READ_ST 0x30 74 #define RV1126_OTP_NVM_PRADDR 0x34 75 #define RV1126_OTP_NVM_PRLEN 0x38 76 #define RV1126_OTP_NVM_PRDATA 0x3c 77 #define RV1126_OTP_NVM_FAILTIME 0x40 78 #define RV1126_OTP_NVM_PRSTART 0x44 79 #define RV1126_OTP_NVM_PRSTATE 0x48 80 81 struct rockchip_otp_platdata { 82 void __iomem *base; 83 unsigned long secure_conf_base; 84 unsigned long otp_mask_base; 85 unsigned long otp_cru_rst_base; 86 }; 87 88 #endif 89