16e12c1ddSJason Zhu /* SPDX-License-Identifier: GPL-2.0+ */ 26e12c1ddSJason Zhu /* 36e12c1ddSJason Zhu * (C) Copyright 2019 Rockchip Electronics Co., Ltd 46e12c1ddSJason Zhu */ 56e12c1ddSJason Zhu 66e12c1ddSJason Zhu #ifndef _ROCKCHIP_OTP_H_ 76e12c1ddSJason Zhu #define _ROCKCHIP_OTP_H_ 86e12c1ddSJason Zhu 96e12c1ddSJason Zhu /* OTP Register Offsets */ 106e12c1ddSJason Zhu #define OTPC_SBPI_CTRL 0x0020 116e12c1ddSJason Zhu #define OTPC_SBPI_CMD_VALID_PRE 0x0024 126e12c1ddSJason Zhu #define OTPC_SBPI_CS_VALID_PRE 0x0028 136e12c1ddSJason Zhu #define OTPC_SBPI_STATUS 0x002C 146e12c1ddSJason Zhu #define OTPC_USER_CTRL 0x0100 156e12c1ddSJason Zhu #define OTPC_USER_ADDR 0x0104 166e12c1ddSJason Zhu #define OTPC_USER_ENABLE 0x0108 176e12c1ddSJason Zhu #define OTPC_USER_QP 0x0120 186e12c1ddSJason Zhu #define OTPC_USER_Q 0x0124 196e12c1ddSJason Zhu #define OTPC_INT_STATUS 0x0304 206e12c1ddSJason Zhu #define OTPC_SBPI_CMD0_OFFSET 0x1000 216e12c1ddSJason Zhu #define OTPC_SBPI_CMD1_OFFSET 0x1004 226e12c1ddSJason Zhu 236e12c1ddSJason Zhu /* OTP Register bits and masks */ 246e12c1ddSJason Zhu #define OTPC_USER_ADDR_MASK GENMASK(31, 16) 256e12c1ddSJason Zhu #define OTPC_USE_USER BIT(0) 266e12c1ddSJason Zhu #define OTPC_USE_USER_MASK GENMASK(16, 16) 276e12c1ddSJason Zhu #define OTPC_USER_FSM_ENABLE BIT(0) 286e12c1ddSJason Zhu #define OTPC_USER_FSM_ENABLE_MASK GENMASK(16, 16) 296e12c1ddSJason Zhu #define OTPC_SBPI_DONE BIT(1) 306e12c1ddSJason Zhu #define OTPC_USER_DONE BIT(2) 316e12c1ddSJason Zhu 326e12c1ddSJason Zhu #define SBPI_DAP_ADDR 0x02 336e12c1ddSJason Zhu #define SBPI_DAP_ADDR_SHIFT 8 346e12c1ddSJason Zhu #define SBPI_DAP_ADDR_MASK GENMASK(31, 24) 356e12c1ddSJason Zhu #define SBPI_CMD_VALID_MASK GENMASK(31, 16) 366e12c1ddSJason Zhu #define SBPI_DAP_CMD_WRF 0xC0 376e12c1ddSJason Zhu #define SBPI_DAP_REG_ECC 0x3A 386e12c1ddSJason Zhu #define SBPI_ECC_ENABLE 0x00 396e12c1ddSJason Zhu #define SBPI_ECC_DISABLE 0x09 406e12c1ddSJason Zhu #define SBPI_ENABLE BIT(0) 416e12c1ddSJason Zhu #define SBPI_ENABLE_MASK GENMASK(16, 16) 426e12c1ddSJason Zhu 436e12c1ddSJason Zhu #define OTPC_TIMEOUT 10000 446e12c1ddSJason Zhu 45*9fed581aSFinley Xiao #define OTPC_MODE_CTRL 0x2000 46*9fed581aSFinley Xiao #define OTPC_IRQ_ST 0x2008 47*9fed581aSFinley Xiao #define OTPC_ACCESS_ADDR 0x200c 48*9fed581aSFinley Xiao #define OTPC_RD_DATA 0x2010 49*9fed581aSFinley Xiao #define OTPC_REPR_RD_TRANS_NUM 0x2020 50*9fed581aSFinley Xiao #define OTPC_DEEP_STANDBY 0x0 51*9fed581aSFinley Xiao #define OTPC_STANDBY 0x1 52*9fed581aSFinley Xiao #define OTPC_ACTIVE 0x2 53*9fed581aSFinley Xiao #define OTPC_READ_ACCESS 0x3 54*9fed581aSFinley Xiao #define OTPC_TRANS_NUM 0x1 55*9fed581aSFinley Xiao #define OTPC_RDM_IRQ_ST BIT(0) 56*9fed581aSFinley Xiao #define OTPC_STB2ACT_IRQ_ST BIT(7) 57*9fed581aSFinley Xiao #define OTPC_DP2STB_IRQ_ST BIT(8) 58*9fed581aSFinley Xiao #define OTPC_ACT2STB_IRQ_ST BIT(9) 59*9fed581aSFinley Xiao #define OTPC_STB2DP_IRQ_ST BIT(10) 60*9fed581aSFinley Xiao #define RK3308BS_NBYTES 4 61*9fed581aSFinley Xiao #define RK3308BS_MAX_BYTES 0x80 62*9fed581aSFinley Xiao #define RK3308BS_NO_SECURE_OFFSET 224 63*9fed581aSFinley Xiao 64fd7b5182SFinley Xiao #define RK3568_NBYTES 2 65fd7b5182SFinley Xiao 66a4c57e8aSFinley Xiao #define RV1126_OTP_NVM_CEB 0x00 67a4c57e8aSFinley Xiao #define RV1126_OTP_NVM_RSTB 0x04 68a4c57e8aSFinley Xiao #define RV1126_OTP_NVM_ST 0x18 69a4c57e8aSFinley Xiao #define RV1126_OTP_NVM_RADDR 0x1C 70a4c57e8aSFinley Xiao #define RV1126_OTP_NVM_RSTART 0x20 71a4c57e8aSFinley Xiao #define RV1126_OTP_NVM_RDATA 0x24 72a4c57e8aSFinley Xiao #define RV1126_OTP_NVM_TRWH 0x28 73a4c57e8aSFinley Xiao #define RV1126_OTP_READ_ST 0x30 74a4c57e8aSFinley Xiao #define RV1126_OTP_NVM_PRADDR 0x34 75a4c57e8aSFinley Xiao #define RV1126_OTP_NVM_PRLEN 0x38 76a4c57e8aSFinley Xiao #define RV1126_OTP_NVM_PRDATA 0x3c 77a4c57e8aSFinley Xiao #define RV1126_OTP_NVM_FAILTIME 0x40 78a4c57e8aSFinley Xiao #define RV1126_OTP_NVM_PRSTART 0x44 79a4c57e8aSFinley Xiao #define RV1126_OTP_NVM_PRSTATE 0x48 806e12c1ddSJason Zhu 816e12c1ddSJason Zhu struct rockchip_otp_platdata { 826e12c1ddSJason Zhu void __iomem *base; 83cbe24667SJason Zhu unsigned long secure_conf_base; 84cbe24667SJason Zhu unsigned long otp_mask_base; 85cf432719SJason Zhu unsigned long otp_cru_rst_base; 866e12c1ddSJason Zhu }; 876e12c1ddSJason Zhu 886e12c1ddSJason Zhu #endif 89