xref: /rk3399_rockchip-uboot/include/rk_timer_irq.h (revision dc8812a0ee9c619aa7d6460758c622f541f8e7f4)
1*dc8812a0SJoseph Chen /*
2*dc8812a0SJoseph Chen  * (C) Copyright 2018 Rockchip Electronics Co., Ltd
3*dc8812a0SJoseph Chen  *
4*dc8812a0SJoseph Chen  * SPDX-License-Identifier:     GPL-2.0+
5*dc8812a0SJoseph Chen  */
6*dc8812a0SJoseph Chen 
7*dc8812a0SJoseph Chen #ifndef _RK_TIMER_IRQ_H
8*dc8812a0SJoseph Chen #define _RK_TIMER_IRQ_H
9*dc8812a0SJoseph Chen 
10*dc8812a0SJoseph Chen #include <irq-platform.h>
11*dc8812a0SJoseph Chen 
12*dc8812a0SJoseph Chen #define TIMER_LOAD_COUNT0	0x00
13*dc8812a0SJoseph Chen #define TIMER_LOAD_COUNT1	0x04
14*dc8812a0SJoseph Chen #define TIMER_CTRL		0x10
15*dc8812a0SJoseph Chen #define TIMER_INTSTATUS		0x18
16*dc8812a0SJoseph Chen 
17*dc8812a0SJoseph Chen #define TIMER_EN		BIT(0)
18*dc8812a0SJoseph Chen #define TIMER_INT_EN		BIT(2)
19*dc8812a0SJoseph Chen #define TIMER_CLR_INT		BIT(0)
20*dc8812a0SJoseph Chen 
21*dc8812a0SJoseph Chen #if defined(CONFIG_ROCKCHIP_RK3128)
22*dc8812a0SJoseph Chen #define TIMER_BASE		(0x20044000 + 0x20)	/* TIMER 1 */
23*dc8812a0SJoseph Chen #define TIMER_IRQ		IRQ_TIMER1
24*dc8812a0SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK322X)
25*dc8812a0SJoseph Chen #define TIMER_BASE		(0x110C0000 + 0x20)	/* TIMER 1 */
26*dc8812a0SJoseph Chen #define TIMER_IRQ		IRQ_TIMER1
27*dc8812a0SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK3288)
28*dc8812a0SJoseph Chen #define TIMER_BASE		(0xFF6B0000 + 0x20)	/* TIMER 1 */
29*dc8812a0SJoseph Chen #define TIMER_IRQ		IRQ_TIMER1
30*dc8812a0SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK3328)
31*dc8812a0SJoseph Chen #define TIMER_BASE		(0xFF1C0000 + 0x20)	/* TIMER 1 */
32*dc8812a0SJoseph Chen #define TIMER_IRQ		IRQ_TIMER1
33*dc8812a0SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK3368)
34*dc8812a0SJoseph Chen #define TIMER_BASE		(0xFF810000 + 0x20)	/* TIMER 1 */
35*dc8812a0SJoseph Chen #define TIMER_IRQ		IRQ_TIMER1
36*dc8812a0SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK3399)
37*dc8812a0SJoseph Chen #define TIMER_BASE		(0xFF850000 + 0x20)	/* TIMER 1 */
38*dc8812a0SJoseph Chen #define TIMER_IRQ		IRQ_TIMER1
39*dc8812a0SJoseph Chen #elif defined(CONFIG_ROCKCHIP_PX30)
40*dc8812a0SJoseph Chen /*
41*dc8812a0SJoseph Chen  * Use timer0 and never change, because timer0 will be used in charge animation
42*dc8812a0SJoseph Chen  * driver to support auto wakeup when system suspend. If core poweroff, PMU only
43*dc8812a0SJoseph Chen  * support timer0(not all timer) as wakeup source.
44*dc8812a0SJoseph Chen  */
45*dc8812a0SJoseph Chen #define TIMER_BASE		(0xFF210000 + 0x00)	/* TIMER 0 */
46*dc8812a0SJoseph Chen #define TIMER_IRQ		IRQ_TIMER0
47*dc8812a0SJoseph Chen #else
48*dc8812a0SJoseph Chen "Missing definitions of timer module test"
49*dc8812a0SJoseph Chen #endif
50*dc8812a0SJoseph Chen 
51*dc8812a0SJoseph Chen #endif
52