1dc8812a0SJoseph Chen /* 2dc8812a0SJoseph Chen * (C) Copyright 2018 Rockchip Electronics Co., Ltd 3dc8812a0SJoseph Chen * 4dc8812a0SJoseph Chen * SPDX-License-Identifier: GPL-2.0+ 5dc8812a0SJoseph Chen */ 6dc8812a0SJoseph Chen 7dc8812a0SJoseph Chen #ifndef _RK_TIMER_IRQ_H 8dc8812a0SJoseph Chen #define _RK_TIMER_IRQ_H 9dc8812a0SJoseph Chen 10dc8812a0SJoseph Chen #include <irq-platform.h> 11dc8812a0SJoseph Chen 123476b706SJoseph Chen #ifdef CONFIG_ROCKCHIP_RK3399 133476b706SJoseph Chen #define TIMER_CTRL 0x1c 143476b706SJoseph Chen #else 153476b706SJoseph Chen #define TIMER_CTRL 0x10 163476b706SJoseph Chen #endif 173476b706SJoseph Chen 18dc8812a0SJoseph Chen #define TIMER_LOAD_COUNT0 0x00 19dc8812a0SJoseph Chen #define TIMER_LOAD_COUNT1 0x04 20dc8812a0SJoseph Chen #define TIMER_INTSTATUS 0x18 21dc8812a0SJoseph Chen 22dc8812a0SJoseph Chen #define TIMER_EN BIT(0) 23dc8812a0SJoseph Chen #define TIMER_INT_EN BIT(2) 24dc8812a0SJoseph Chen #define TIMER_CLR_INT BIT(0) 25dc8812a0SJoseph Chen 26dc8812a0SJoseph Chen #if defined(CONFIG_ROCKCHIP_RK3128) 27dc8812a0SJoseph Chen #define TIMER_BASE (0x20044000 + 0x20) /* TIMER 1 */ 28dc8812a0SJoseph Chen #define TIMER_IRQ IRQ_TIMER1 29dc8812a0SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK322X) 30dc8812a0SJoseph Chen #define TIMER_BASE (0x110C0000 + 0x20) /* TIMER 1 */ 31dc8812a0SJoseph Chen #define TIMER_IRQ IRQ_TIMER1 32dc8812a0SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK3288) 33dc8812a0SJoseph Chen #define TIMER_BASE (0xFF6B0000 + 0x20) /* TIMER 1 */ 34dc8812a0SJoseph Chen #define TIMER_IRQ IRQ_TIMER1 35dc8812a0SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK3328) 36dc8812a0SJoseph Chen #define TIMER_BASE (0xFF1C0000 + 0x20) /* TIMER 1 */ 37dc8812a0SJoseph Chen #define TIMER_IRQ IRQ_TIMER1 38dc8812a0SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK3368) 39dc8812a0SJoseph Chen #define TIMER_BASE (0xFF810000 + 0x20) /* TIMER 1 */ 40dc8812a0SJoseph Chen #define TIMER_IRQ IRQ_TIMER1 41dc8812a0SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK3399) 42dc8812a0SJoseph Chen #define TIMER_BASE (0xFF850000 + 0x20) /* TIMER 1 */ 43dc8812a0SJoseph Chen #define TIMER_IRQ IRQ_TIMER1 44*0b4bf976SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK3308) 45*0b4bf976SJoseph Chen #define TIMER_BASE (0xFF1a0000 + 0x20) /* TIMER 1 */ 46*0b4bf976SJoseph Chen #define TIMER_IRQ IRQ_TIMER1 47dc8812a0SJoseph Chen #elif defined(CONFIG_ROCKCHIP_PX30) 48dc8812a0SJoseph Chen /* 49dc8812a0SJoseph Chen * Use timer0 and never change, because timer0 will be used in charge animation 50dc8812a0SJoseph Chen * driver to support auto wakeup when system suspend. If core poweroff, PMU only 51dc8812a0SJoseph Chen * support timer0(not all timer) as wakeup source. 52dc8812a0SJoseph Chen */ 53dc8812a0SJoseph Chen #define TIMER_BASE (0xFF210000 + 0x00) /* TIMER 0 */ 54dc8812a0SJoseph Chen #define TIMER_IRQ IRQ_TIMER0 55dc8812a0SJoseph Chen #else 56dc8812a0SJoseph Chen "Missing definitions of timer module test" 57dc8812a0SJoseph Chen #endif 58dc8812a0SJoseph Chen 59dc8812a0SJoseph Chen #endif 60