xref: /rk3399_rockchip-uboot/include/rk_timer_irq.h (revision f30e68c4094a5a05c60fec11119a1b6f7cdaec26)
1dc8812a0SJoseph Chen /*
2c928344eSJoseph Chen  * (C) Copyright 2022 Rockchip Electronics Co., Ltd
3dc8812a0SJoseph Chen  *
4dc8812a0SJoseph Chen  * SPDX-License-Identifier:     GPL-2.0+
5dc8812a0SJoseph Chen  */
6dc8812a0SJoseph Chen 
7dc8812a0SJoseph Chen #ifndef _RK_TIMER_IRQ_H
8dc8812a0SJoseph Chen #define _RK_TIMER_IRQ_H
9dc8812a0SJoseph Chen 
10dc8812a0SJoseph Chen #include <irq-platform.h>
11dc8812a0SJoseph Chen 
123476b706SJoseph Chen #ifdef CONFIG_ROCKCHIP_RK3399
133476b706SJoseph Chen #define TIMER_CTRL		0x1c
143476b706SJoseph Chen #else
153476b706SJoseph Chen #define TIMER_CTRL		0x10
163476b706SJoseph Chen #endif
173476b706SJoseph Chen 
18dc8812a0SJoseph Chen #define TIMER_LOAD_COUNT0	0x00
19dc8812a0SJoseph Chen #define TIMER_LOAD_COUNT1	0x04
20dc8812a0SJoseph Chen #define TIMER_INTSTATUS		0x18
21dc8812a0SJoseph Chen 
22dc8812a0SJoseph Chen #define TIMER_EN		BIT(0)
23dc8812a0SJoseph Chen #define TIMER_INT_EN		BIT(2)
24dc8812a0SJoseph Chen #define TIMER_CLR_INT		BIT(0)
25dc8812a0SJoseph Chen 
26dc8812a0SJoseph Chen #if defined(CONFIG_ROCKCHIP_RK3128)
27dc8812a0SJoseph Chen #define TIMER_BASE		(0x20044000 + 0x20)	/* TIMER 1 */
28dc8812a0SJoseph Chen #define TIMER_IRQ		IRQ_TIMER1
29dc8812a0SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK322X)
30dc8812a0SJoseph Chen #define TIMER_BASE		(0x110C0000 + 0x20)	/* TIMER 1 */
31dc8812a0SJoseph Chen #define TIMER_IRQ		IRQ_TIMER1
32dc8812a0SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK3288)
33dc8812a0SJoseph Chen #define TIMER_BASE		(0xFF6B0000 + 0x20)	/* TIMER 1 */
34dc8812a0SJoseph Chen #define TIMER_IRQ		IRQ_TIMER1
35dc8812a0SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK3328)
36dc8812a0SJoseph Chen #define TIMER_BASE		(0xFF1C0000 + 0x20)	/* TIMER 1 */
37dc8812a0SJoseph Chen #define TIMER_IRQ		IRQ_TIMER1
38dc8812a0SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK3368)
391380460aSXiaoDong Huang /*
401380460aSXiaoDong Huang  * Use timer0 and never change, because timer0 will be used in charge animation
411380460aSXiaoDong Huang  * driver to support auto wakeup when system suspend. If core poweroff, PMU only
421380460aSXiaoDong Huang  * support timer0(not all timer) as wakeup source.
431380460aSXiaoDong Huang  */
441380460aSXiaoDong Huang #define TIMER_BASE		(0xFF810000 + 0x00)	/* TIMER 0 */
451380460aSXiaoDong Huang #define TIMER_IRQ		IRQ_TIMER0
46dc8812a0SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK3399)
47dc8812a0SJoseph Chen #define TIMER_BASE		(0xFF850000 + 0x20)	/* TIMER 1 */
48dc8812a0SJoseph Chen #define TIMER_IRQ		IRQ_TIMER1
490b4bf976SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK3308)
500b4bf976SJoseph Chen #define TIMER_BASE		(0xFF1a0000 + 0x20)	/* TIMER 1 */
510b4bf976SJoseph Chen #define TIMER_IRQ		IRQ_TIMER1
52dc8812a0SJoseph Chen #elif defined(CONFIG_ROCKCHIP_PX30)
53dc8812a0SJoseph Chen /*
54dc8812a0SJoseph Chen  * Use timer0 and never change, because timer0 will be used in charge animation
55dc8812a0SJoseph Chen  * driver to support auto wakeup when system suspend. If core poweroff, PMU only
56dc8812a0SJoseph Chen  * support timer0(not all timer) as wakeup source.
57dc8812a0SJoseph Chen  */
58dc8812a0SJoseph Chen #define TIMER_BASE		(0xFF210000 + 0x00)	/* TIMER 0 */
59dc8812a0SJoseph Chen #define TIMER_IRQ		IRQ_TIMER0
6047ad8107SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK1808)
6147ad8107SJoseph Chen #define TIMER_BASE		(0xFF700000 + 0x20)	/* TIMER 1 */
6247ad8107SJoseph Chen #define TIMER_IRQ		IRQ_TIMER1
63b9dcc643SXuhui Lin #elif defined(CONFIG_ROCKCHIP_RV1103B)
64*f30e68c4SXuhui Lin #define TIMER_BASE		(0x20830000 + 0x10000)	/* TIMER 1 */
65b9dcc643SXuhui Lin #define TIMER_IRQ		IRQ_TIMER1
66c928344eSJoseph Chen #elif defined(CONFIG_ROCKCHIP_RV1106)
67c928344eSJoseph Chen #define TIMER_BASE		(0xFF660000 + 0x20)	/* TIMER 1 */
68c928344eSJoseph Chen #define TIMER_IRQ		IRQ_TIMER1
69066e9bcbSJoseph Chen #elif defined(CONFIG_ROCKCHIP_RV1126)
70066e9bcbSJoseph Chen #define TIMER_BASE		(0xFF660000 + 0x20)	/* TIMER 1 */
71066e9bcbSJoseph Chen #define TIMER_IRQ		IRQ_TIMER1
724e72b326SXuhui Lin #elif defined(CONFIG_ROCKCHIP_RV1126B)
73*f30e68c4SXuhui Lin #define TIMER_BASE		(0x20c00000 + 0x10000)	/* TIMER 1 */
744e72b326SXuhui Lin #define TIMER_IRQ		IRQ_TIMER1
7585e5c210SXuhui Lin #elif defined(CONFIG_ROCKCHIP_RK3506)
7685e5c210SXuhui Lin #define TIMER_BASE		(0xFF250000 + 0x00)	/* TIMER 0 */
7785e5c210SXuhui Lin #define TIMER_IRQ		IRQ_TIMER0
78c6f7c1a3SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK3528)
79c6f7c1a3SJoseph Chen #define TIMER_BASE		(0xFFAB0000 + 0x00)	/* TIMER 0 */
80c6f7c1a3SJoseph Chen #define TIMER_IRQ		IRQ_TIMER0
8156f7d184SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK3562)
8256f7d184SJoseph Chen #define TIMER_BASE		(0xFFA50000 + 0x00)	/* TIMER 0 */
8356f7d184SJoseph Chen #define TIMER_IRQ		IRQ_TIMER0
845033f049SJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK3568)
855033f049SJoseph Chen /* Only timer0 can wakeup system suspend */
86*f30e68c4SXuhui Lin #define TIMER_BASE		(0xFE5F0000 + 0x00)	/* TIMER 0 */
875033f049SJoseph Chen #define TIMER_IRQ		IRQ_TIMER0
88bf72c9c9SXuhui Lin #elif defined(CONFIG_ROCKCHIP_RK3576)
89bf72c9c9SXuhui Lin #define TIMER_BASE		(0x2acc0000 + 0x00)	/* TIMER 0 */
90bf72c9c9SXuhui Lin #define TIMER_IRQ		IRQ_TIMER0
91c20dcaebSJoseph Chen #elif defined(CONFIG_ROCKCHIP_RK3588)
92c20dcaebSJoseph Chen /* Only timer0 can wakeup system suspend */
93c20dcaebSJoseph Chen #define TIMER_BASE		(0xFEAE0000 + 0x00)	/* TIMER 0 */
94c20dcaebSJoseph Chen #define TIMER_IRQ		IRQ_TIMER0
95dc8812a0SJoseph Chen #else
96dc8812a0SJoseph Chen "Missing definitions of timer module test"
97dc8812a0SJoseph Chen #endif
98dc8812a0SJoseph Chen 
99dc8812a0SJoseph Chen #endif
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