xref: /rk3399_rockchip-uboot/include/power/pfuze100_pmic.h (revision ee52f1a5fedcb261f75054352a2ef52f7a6e6dbc)
1 /*
2  *  Copyright (C) 2014 Gateworks Corporation
3  *  Tim Harvey <tharvey@gateworks.com>
4  *
5  * SPDX-License-Identifier:     GPL-2.0+
6  */
7 
8 #ifndef __PFUZE100_PMIC_H_
9 #define __PFUZE100_PMIC_H_
10 
11 /* PFUZE100 registers */
12 enum {
13 	PFUZE100_DEVICEID	= 0x00,
14 	PFUZE100_REVID		= 0x03,
15 	PFUZE100_FABID		= 0x04,
16 
17 	PFUZE100_SW1ABVOL	= 0x20,
18 	PFUZE100_SW1ABSTBY	= 0x21,
19 	PUZE_100_SW1ABCONF	= 0x24,
20 	PFUZE100_SW1CVOL	= 0x2e,
21 	PFUZE100_SW1CSTBY	= 0x2f,
22 	PFUZE100_SW1CCONF	= 0x32,
23 	PFUZE100_SW2VOL		= 0x35,
24 	PFUZE100_SW3AVOL	= 0x3c,
25 	PFUZE100_SW3BVOL	= 0x43,
26 	PFUZE100_SW4VOL		= 0x4a,
27 	PFUZE100_SWBSTCON1	= 0x66,
28 	PFUZE100_VREFDDRCON	= 0x6a,
29 	PFUZE100_VSNVSVOL	= 0x6b,
30 	PFUZE100_VGEN1VOL	= 0x6c,
31 	PFUZE100_VGEN2VOL	= 0x6d,
32 	PFUZE100_VGEN3VOL	= 0x6e,
33 	PFUZE100_VGEN4VOL	= 0x6f,
34 	PFUZE100_VGEN5VOL	= 0x70,
35 	PFUZE100_VGEN6VOL	= 0x71,
36 
37 	PMIC_NUM_OF_REGS	= 0x7f,
38 };
39 
40 /*
41  * Buck Regulators
42  */
43 
44 #define PFUZE100_SW1ABC_SETP(x)	((x - 3000) / 250)
45 
46 /* SW1A/B/C Output Voltage Configuration */
47 #define SW1x_0_300V 0
48 #define SW1x_0_325V 1
49 #define SW1x_0_350V 2
50 #define SW1x_0_375V 3
51 #define SW1x_0_400V 4
52 #define SW1x_0_425V 5
53 #define SW1x_0_450V 6
54 #define SW1x_0_475V 7
55 #define SW1x_0_500V 8
56 #define SW1x_0_525V 9
57 #define SW1x_0_550V 10
58 #define SW1x_0_575V 11
59 #define SW1x_0_600V 12
60 #define SW1x_0_625V 13
61 #define SW1x_0_650V 14
62 #define SW1x_0_675V 15
63 #define SW1x_0_700V 16
64 #define SW1x_0_725V 17
65 #define SW1x_0_750V 18
66 #define SW1x_0_775V 19
67 #define SW1x_0_800V 20
68 #define SW1x_0_825V 21
69 #define SW1x_0_850V 22
70 #define SW1x_0_875V 23
71 #define SW1x_0_900V 24
72 #define SW1x_0_925V 25
73 #define SW1x_0_950V 26
74 #define SW1x_0_975V 27
75 #define SW1x_1_000V 28
76 #define SW1x_1_025V 29
77 #define SW1x_1_050V 30
78 #define SW1x_1_075V 31
79 #define SW1x_1_100V 32
80 #define SW1x_1_125V 33
81 #define SW1x_1_150V 34
82 #define SW1x_1_175V 35
83 #define SW1x_1_200V 36
84 #define SW1x_1_225V 37
85 #define SW1x_1_250V 38
86 #define SW1x_1_275V 39
87 #define SW1x_1_300V 40
88 #define SW1x_1_325V 41
89 #define SW1x_1_350V 42
90 #define SW1x_1_375V 43
91 #define SW1x_1_400V 44
92 #define SW1x_1_425V 45
93 #define SW1x_1_450V 46
94 #define SW1x_1_475V 47
95 #define SW1x_1_500V 48
96 #define SW1x_1_525V 49
97 #define SW1x_1_550V 50
98 #define SW1x_1_575V 51
99 #define SW1x_1_600V 52
100 #define SW1x_1_625V 53
101 #define SW1x_1_650V 54
102 #define SW1x_1_675V 55
103 #define SW1x_1_700V 56
104 #define SW1x_1_725V 57
105 #define SW1x_1_750V 58
106 #define SW1x_1_775V 59
107 #define SW1x_1_800V 60
108 #define SW1x_1_825V 61
109 #define SW1x_1_850V 62
110 #define SW1x_1_875V 63
111 
112 #define SW1x_NORMAL_MASK  0x3f
113 #define SW1x_STBY_MASK    0x3f
114 #define SW1x_OFF_MASK     0x3f
115 
116 #define SW1xCONF_DVSSPEED_MASK 0xc0
117 #define SW1xCONF_DVSSPEED_2US  0x00
118 #define SW1xCONF_DVSSPEED_4US  0x40
119 #define SW1xCONF_DVSSPEED_8US  0x80
120 #define SW1xCONF_DVSSPEED_16US 0xc0
121 
122 /*
123  * LDO Configuration
124  */
125 
126 /* VGEN1/2 Voltage Configuration */
127 #define LDOA_0_80V	0
128 #define LDOA_0_85V	1
129 #define LDOA_0_90V	2
130 #define LDOA_0_95V	3
131 #define LDOA_1_00V	4
132 #define LDOA_1_05V	5
133 #define LDOA_1_10V	6
134 #define LDOA_1_15V	7
135 #define LDOA_1_20V	8
136 #define LDOA_1_25V	9
137 #define LDOA_1_30V	10
138 #define LDOA_1_35V	11
139 #define LDOA_1_40V	12
140 #define LDOA_1_45V	13
141 #define LDOA_1_50V	14
142 #define LDOA_1_55V	15
143 
144 /* VGEN3/4/5/6 Voltage Configuration */
145 #define LDOB_1_80V	0
146 #define LDOB_1_90V	1
147 #define LDOB_2_00V	2
148 #define LDOB_2_10V	3
149 #define LDOB_2_20V	4
150 #define LDOB_2_30V	5
151 #define LDOB_2_40V	6
152 #define LDOB_2_50V	7
153 #define LDOB_2_60V	8
154 #define LDOB_2_70V	9
155 #define LDOB_2_80V	10
156 #define LDOB_2_90V	11
157 #define LDOB_3_00V	12
158 #define LDOB_3_10V	13
159 #define LDOB_3_20V	14
160 #define LDOB_3_30V	15
161 
162 #define LDO_VOL_MASK	0xf
163 #define LDO_EN		4
164 
165 /*
166  * Boost Regulator
167  */
168 
169 /* SWBST Output Voltage */
170 #define SWBST_5_00V	0
171 #define SWBST_5_05V	1
172 #define SWBST_5_10V	2
173 #define SWBST_5_15V	3
174 
175 #define SWBST_VOL_MASK	0x3
176 #define SWBST_MODE_MASK	0x6
177 #define SWBST_MODE_OFF	(2 << 0)
178 #define SWBST_MODE_PFM	(2 << 1)
179 #define SWBST_MODE_AUTO	(2 << 2)
180 #define SWBST_MODE_APS	(2 << 3)
181 
182 int power_pfuze100_init(unsigned char bus);
183 #endif
184