1*a643acd4SFabio Estevam /* 2*a643acd4SFabio Estevam * Copyright (C) 2015 Freescale Semiconductor, Inc. 3*a643acd4SFabio Estevam * Fabio Estevam <fabio.estevam@freescale.com> 4*a643acd4SFabio Estevam * 5*a643acd4SFabio Estevam * SPDX-License-Identifier: GPL-2.0+ 6*a643acd4SFabio Estevam */ 7*a643acd4SFabio Estevam 8*a643acd4SFabio Estevam #ifndef __MAX77696_PMIC_H__ 9*a643acd4SFabio Estevam #define __MAX77696_PMIC_H__ 10*a643acd4SFabio Estevam 11*a643acd4SFabio Estevam #define CONFIG_POWER_MAX77696_I2C_ADDR 0x3C 12*a643acd4SFabio Estevam 13*a643acd4SFabio Estevam enum { 14*a643acd4SFabio Estevam L01_CNFG1 = 0x43, 15*a643acd4SFabio Estevam L01_CNFG2, 16*a643acd4SFabio Estevam L02_CNFG1, 17*a643acd4SFabio Estevam L02_CNFG2, 18*a643acd4SFabio Estevam L03_CNFG1, 19*a643acd4SFabio Estevam L03_CNFG2, 20*a643acd4SFabio Estevam L04_CNFG1, 21*a643acd4SFabio Estevam L04_CNFG2, 22*a643acd4SFabio Estevam L05_CNFG1, 23*a643acd4SFabio Estevam L05_CNFG2, 24*a643acd4SFabio Estevam L06_CNFG1, 25*a643acd4SFabio Estevam L06_CNFG2, 26*a643acd4SFabio Estevam L07_CNFG1, 27*a643acd4SFabio Estevam L07_CNFG2, 28*a643acd4SFabio Estevam L08_CNFG1, 29*a643acd4SFabio Estevam L08_CNFG2, 30*a643acd4SFabio Estevam L09_CNFG1, 31*a643acd4SFabio Estevam L09_CNFG2, 32*a643acd4SFabio Estevam L10_CNFG1, 33*a643acd4SFabio Estevam L10_CNFG2, 34*a643acd4SFabio Estevam LDO_INT1, 35*a643acd4SFabio Estevam LDO_INT2, 36*a643acd4SFabio Estevam LDO_INT1M, 37*a643acd4SFabio Estevam LDO_INT2M, 38*a643acd4SFabio Estevam LDO_CNFG3, 39*a643acd4SFabio Estevam SW1_CNTRL, 40*a643acd4SFabio Estevam SW2_CNTRL, 41*a643acd4SFabio Estevam SW3_CNTRL, 42*a643acd4SFabio Estevam SW4_CNTRL, 43*a643acd4SFabio Estevam EPDCNFG, 44*a643acd4SFabio Estevam EPDINTS, 45*a643acd4SFabio Estevam EPDINT, 46*a643acd4SFabio Estevam EPDINTM, 47*a643acd4SFabio Estevam EPDVCOM, 48*a643acd4SFabio Estevam EPDVEE, 49*a643acd4SFabio Estevam EPDVNEG, 50*a643acd4SFabio Estevam EPDVPOS, 51*a643acd4SFabio Estevam EPDVDDH, 52*a643acd4SFabio Estevam EPDSEQ, 53*a643acd4SFabio Estevam EPDOKINTS, 54*a643acd4SFabio Estevam CID = 0x9c, 55*a643acd4SFabio Estevam PMIC_NUM_OF_REGS, 56*a643acd4SFabio Estevam }; 57*a643acd4SFabio Estevam 58*a643acd4SFabio Estevam int power_max77696_init(unsigned char bus); 59*a643acd4SFabio Estevam 60*a643acd4SFabio Estevam #endif 61