1*04750447SPiotr Wilczek /* 2*04750447SPiotr Wilczek * Copyright (C) 2013 Samsung Electronics 3*04750447SPiotr Wilczek * Piotr Wilczek <p.wilczek@samsung.com> 4*04750447SPiotr Wilczek * 5*04750447SPiotr Wilczek * SPDX-License-Identifier: GPL-2.0+ 6*04750447SPiotr Wilczek */ 7*04750447SPiotr Wilczek 8*04750447SPiotr Wilczek #ifndef __MAX77693_MUIC_H_ 9*04750447SPiotr Wilczek #define __MAX77693_MUIC_H_ 10*04750447SPiotr Wilczek 11*04750447SPiotr Wilczek #include <power/power_chrg.h> 12*04750447SPiotr Wilczek 13*04750447SPiotr Wilczek /* 14*04750447SPiotr Wilczek * MUIC REGISTER 15*04750447SPiotr Wilczek */ 16*04750447SPiotr Wilczek 17*04750447SPiotr Wilczek #define MAX77693_MUIC_PREFIX "max77693-muic:" 18*04750447SPiotr Wilczek 19*04750447SPiotr Wilczek /* MAX77693_MUIC_STATUS1 */ 20*04750447SPiotr Wilczek #define MAX77693_MUIC_ADC_MASK 0x1F 21*04750447SPiotr Wilczek 22*04750447SPiotr Wilczek /* MAX77693_MUIC_STATUS2 */ 23*04750447SPiotr Wilczek #define MAX77693_MUIC_CHG_NO 0x00 24*04750447SPiotr Wilczek #define MAX77693_MUIC_CHG_USB 0x01 25*04750447SPiotr Wilczek #define MAX77693_MUIC_CHG_USB_D 0x02 26*04750447SPiotr Wilczek #define MAX77693_MUIC_CHG_TA 0x03 27*04750447SPiotr Wilczek #define MAX77693_MUIC_CHG_TA_500 0x04 28*04750447SPiotr Wilczek #define MAX77693_MUIC_CHG_TA_1A 0x05 29*04750447SPiotr Wilczek #define MAX77693_MUIC_CHG_MASK 0x07 30*04750447SPiotr Wilczek 31*04750447SPiotr Wilczek /* MAX77693_MUIC_CONTROL1 */ 32*04750447SPiotr Wilczek #define MAX77693_MUIC_CTRL1_DN1DP2 ((0x1 << 3) | 0x1) 33*04750447SPiotr Wilczek #define MAX77693_MUIC_CTRL1_UT1UR2 ((0x3 << 3) | 0x3) 34*04750447SPiotr Wilczek #define MAX77693_MUIC_CTRL1_ADN1ADP2 ((0x4 << 3) | 0x4) 35*04750447SPiotr Wilczek #define MAX77693_MUIC_CTRL1_AUT1AUR2 ((0x5 << 3) | 0x5) 36*04750447SPiotr Wilczek #define MAX77693_MUIC_CTRL1_MASK 0xC0 37*04750447SPiotr Wilczek 38*04750447SPiotr Wilczek #define MUIC_PATH_USB 0 39*04750447SPiotr Wilczek #define MUIC_PATH_UART 1 40*04750447SPiotr Wilczek 41*04750447SPiotr Wilczek #define MUIC_PATH_CP 0 42*04750447SPiotr Wilczek #define MUIC_PATH_AP 1 43*04750447SPiotr Wilczek 44*04750447SPiotr Wilczek enum muic_path { 45*04750447SPiotr Wilczek MUIC_PATH_USB_CP, 46*04750447SPiotr Wilczek MUIC_PATH_USB_AP, 47*04750447SPiotr Wilczek MUIC_PATH_UART_CP, 48*04750447SPiotr Wilczek MUIC_PATH_UART_AP, 49*04750447SPiotr Wilczek }; 50*04750447SPiotr Wilczek 51*04750447SPiotr Wilczek /* MAX 777693 MUIC registers */ 52*04750447SPiotr Wilczek enum { 53*04750447SPiotr Wilczek MAX77693_MUIC_ID = 0x00, 54*04750447SPiotr Wilczek MAX77693_MUIC_INT1 = 0x01, 55*04750447SPiotr Wilczek MAX77693_MUIC_INT2 = 0x02, 56*04750447SPiotr Wilczek MAX77693_MUIC_INT3 = 0x03, 57*04750447SPiotr Wilczek MAX77693_MUIC_STATUS1 = 0x04, 58*04750447SPiotr Wilczek MAX77693_MUIC_STATUS2 = 0x05, 59*04750447SPiotr Wilczek MAX77693_MUIC_STATUS3 = 0x06, 60*04750447SPiotr Wilczek MAX77693_MUIC_INTMASK1 = 0x07, 61*04750447SPiotr Wilczek MAX77693_MUIC_INTMASK2 = 0x08, 62*04750447SPiotr Wilczek MAX77693_MUIC_INTMASK3 = 0x09, 63*04750447SPiotr Wilczek MAX77693_MUIC_CDETCTRL = 0x0A, 64*04750447SPiotr Wilczek MAX77693_MUIC_CONTROL1 = 0x0C, 65*04750447SPiotr Wilczek MAX77693_MUIC_CONTROL2 = 0x0D, 66*04750447SPiotr Wilczek MAX77693_MUIC_CONTROL3 = 0x0E, 67*04750447SPiotr Wilczek 68*04750447SPiotr Wilczek MUIC_NUM_OF_REGS = 0x0F, 69*04750447SPiotr Wilczek }; 70*04750447SPiotr Wilczek 71*04750447SPiotr Wilczek #define MAX77693_MUIC_I2C_ADDR (0x4A >> 1) 72*04750447SPiotr Wilczek 73*04750447SPiotr Wilczek int power_muic_init(unsigned int bus); 74*04750447SPiotr Wilczek #endif /* __MAX77693_MUIC_H_ */ 75