xref: /rk3399_rockchip-uboot/include/power/as3722.h (revision c2012cb47cc0b02569c011a0e588b22e07856076)
16173c45bSThierry Reding /*
26173c45bSThierry Reding  * Copyright (C) 2014 NVIDIA Corporation
36173c45bSThierry Reding  *
46173c45bSThierry Reding  * SPDX-License-Identifier: GPL-2.0+
56173c45bSThierry Reding  */
66173c45bSThierry Reding 
76173c45bSThierry Reding #ifndef __POWER_AS3722_H__
86173c45bSThierry Reding #define __POWER_AS3722_H__
96173c45bSThierry Reding 
106173c45bSThierry Reding #include <asm/types.h>
116173c45bSThierry Reding 
126173c45bSThierry Reding #define AS3722_GPIO_OUTPUT_VDDH (1 << 0)
136173c45bSThierry Reding #define AS3722_GPIO_INVERT (1 << 1)
146173c45bSThierry Reding 
15deea211aSSimon Glass #define AS3722_DEVICE_ID 0x0c
16deea211aSSimon Glass #define AS3722_SD_VOLTAGE(n) (0x00 + (n))
17deea211aSSimon Glass #define AS3722_LDO_VOLTAGE(n) (0x10 + (n))
18deea211aSSimon Glass #define AS3722_SD_CONTROL 0x4d
19deea211aSSimon Glass #define AS3722_LDO_CONTROL 0x4e
20deea211aSSimon Glass #define AS3722_ASIC_ID1 0x90
21deea211aSSimon Glass #define AS3722_ASIC_ID2 0x91
22deea211aSSimon Glass 
23*c2012cb4SSimon Glass #define AS3722_GPIO_CONTROL(n) (0x08 + (n))
24*c2012cb4SSimon Glass #define AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDH (1 << 0)
25*c2012cb4SSimon Glass #define AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDL (7 << 0)
26*c2012cb4SSimon Glass #define AS3722_GPIO_CONTROL_INVERT (1 << 7)
27*c2012cb4SSimon Glass 
286173c45bSThierry Reding struct udevice;
296173c45bSThierry Reding 
306173c45bSThierry Reding int as3722_init(struct udevice **devp);
316173c45bSThierry Reding int as3722_sd_enable(struct udevice *pmic, unsigned int sd);
326173c45bSThierry Reding int as3722_sd_set_voltage(struct udevice *pmic, unsigned int sd, u8 value);
336173c45bSThierry Reding int as3722_ldo_enable(struct udevice *pmic, unsigned int ldo);
346173c45bSThierry Reding int as3722_ldo_set_voltage(struct udevice *pmic, unsigned int ldo, u8 value);
356173c45bSThierry Reding int as3722_gpio_configure(struct udevice *pmic, unsigned int gpio,
366173c45bSThierry Reding 			  unsigned long flags);
376173c45bSThierry Reding int as3722_gpio_direction_output(struct udevice *pmic, unsigned int gpio,
386173c45bSThierry Reding 				 unsigned int level);
39d55b7d4cSSimon Glass int as3722_read(struct udevice *pmic, u8 reg, u8 *value);
40d55b7d4cSSimon Glass int as3722_write(struct udevice *pmic, u8 reg, u8 value);
41d55b7d4cSSimon Glass int as3722_get(struct udevice **devp);
426173c45bSThierry Reding 
436173c45bSThierry Reding #endif /* __POWER_AS3722_H__ */
44