17133d4c4Swdenk /* 27133d4c4Swdenk * (C) Copyright 2002 37133d4c4Swdenk * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 47133d4c4Swdenk * 57133d4c4Swdenk * See file CREDITS for list of people who contributed to this 67133d4c4Swdenk * project. 77133d4c4Swdenk * 87133d4c4Swdenk * This program is free software; you can redistribute it and/or 97133d4c4Swdenk * modify it under the terms of the GNU General Public License as 107133d4c4Swdenk * published by the Free Software Foundation; either version 2 of 117133d4c4Swdenk * the License, or (at your option) any later version. 127133d4c4Swdenk * 137133d4c4Swdenk * This program is distributed in the hope that it will be useful, 147133d4c4Swdenk * but WITHOUT ANY WARRANTY; without even the implied warranty of 157133d4c4Swdenk * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 167133d4c4Swdenk * GNU General Public License for more details. 177133d4c4Swdenk * 187133d4c4Swdenk * You should have received a copy of the GNU General Public License 197133d4c4Swdenk * along with this program; if not, write to the Free Software 207133d4c4Swdenk * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 217133d4c4Swdenk * MA 02111-1307 USA 227133d4c4Swdenk */ 237133d4c4Swdenk #ifndef _POST_H 247133d4c4Swdenk #define _POST_H 257133d4c4Swdenk 267133d4c4Swdenk #ifndef __ASSEMBLY__ 277133d4c4Swdenk #include <common.h> 287133d4c4Swdenk #endif 297133d4c4Swdenk 307133d4c4Swdenk #ifdef CONFIG_POST 317133d4c4Swdenk 327133d4c4Swdenk #define POST_POWERON 0x01 /* test runs on power-on booting */ 338564acf9Swdenk #define POST_NORMAL 0x02 /* test runs on normal booting */ 348564acf9Swdenk #define POST_SLOWTEST 0x04 /* test is slow, enabled by key press */ 357133d4c4Swdenk #define POST_POWERTEST 0x08 /* test runs after watchdog reset */ 367133d4c4Swdenk 3727b207fdSwdenk #define POST_COLDBOOT 0x80 /* first boot after power-on */ 3827b207fdSwdenk 397133d4c4Swdenk #define POST_ROM 0x0100 /* test runs in ROM */ 407133d4c4Swdenk #define POST_RAM 0x0200 /* test runs in RAM */ 417133d4c4Swdenk #define POST_MANUAL 0x0400 /* test runs on diag command */ 427133d4c4Swdenk #define POST_REBOOT 0x0800 /* test may cause rebooting */ 43228f29acSwdenk #define POST_PREREL 0x1000 /* test runs before relocation */ 447133d4c4Swdenk 457133d4c4Swdenk #define POST_MEM (POST_RAM | POST_ROM) 468564acf9Swdenk #define POST_ALWAYS (POST_NORMAL | \ 478564acf9Swdenk POST_SLOWTEST | \ 487133d4c4Swdenk POST_MANUAL | \ 497133d4c4Swdenk POST_POWERON ) 507133d4c4Swdenk 517133d4c4Swdenk #ifndef __ASSEMBLY__ 527133d4c4Swdenk 537133d4c4Swdenk struct post_test { 547133d4c4Swdenk char *name; 557133d4c4Swdenk char *cmd; 567133d4c4Swdenk char *desc; 577133d4c4Swdenk int flags; 587133d4c4Swdenk int (*test) (int flags); 594532cb69Swdenk int (*init_f) (void); 604532cb69Swdenk void (*reloc) (void); 61228f29acSwdenk unsigned long testid; 627133d4c4Swdenk }; 634532cb69Swdenk int post_init_f (void); 647133d4c4Swdenk void post_bootmode_init (void); 657133d4c4Swdenk int post_bootmode_get (unsigned int * last_test); 667133d4c4Swdenk void post_bootmode_clear (void); 67228f29acSwdenk void post_output_backlog ( void ); 687133d4c4Swdenk int post_run (char *name, int flags); 697133d4c4Swdenk int post_info (char *name); 707133d4c4Swdenk int post_log (char *format, ...); 717133d4c4Swdenk void post_reloc (void); 724532cb69Swdenk unsigned long post_time_ms (unsigned long base); 737133d4c4Swdenk 747133d4c4Swdenk extern struct post_test post_list[]; 757133d4c4Swdenk extern unsigned int post_list_size; 7627b207fdSwdenk extern int post_hotkeys_pressed(void); 777133d4c4Swdenk 787133d4c4Swdenk #endif /* __ASSEMBLY__ */ 797133d4c4Swdenk 807133d4c4Swdenk #define CFG_POST_RTC 0x00000001 817133d4c4Swdenk #define CFG_POST_WATCHDOG 0x00000002 827133d4c4Swdenk #define CFG_POST_MEMORY 0x00000004 837133d4c4Swdenk #define CFG_POST_CPU 0x00000008 847133d4c4Swdenk #define CFG_POST_I2C 0x00000010 857133d4c4Swdenk #define CFG_POST_CACHE 0x00000020 867133d4c4Swdenk #define CFG_POST_UART 0x00000040 877133d4c4Swdenk #define CFG_POST_ETHER 0x00000080 887133d4c4Swdenk #define CFG_POST_SPI 0x00000100 897133d4c4Swdenk #define CFG_POST_USB 0x00000200 907133d4c4Swdenk #define CFG_POST_SPR 0x00000400 914532cb69Swdenk #define CFG_POST_SYSMON 0x00000800 925a8c51cdSwdenk #define CFG_POST_DSP 0x00001000 93*79fa88f3Swdenk #define CFG_POST_CODEC 0x00002000 947133d4c4Swdenk 957133d4c4Swdenk #endif /* CONFIG_POST */ 967133d4c4Swdenk 977133d4c4Swdenk #endif /* _POST_H */ 98