xref: /rk3399_rockchip-uboot/include/pcmcia.h (revision 068b60a0eb7e73b243ca55399f2a7df76e2c3f3d)
1affae2bfSwdenk /*
204a85b3bSwdenk  * (C) Copyright 2000-2004
3affae2bfSwdenk  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4affae2bfSwdenk  *
5affae2bfSwdenk  * See file CREDITS for list of people who contributed to this
6affae2bfSwdenk  * project.
7affae2bfSwdenk  *
8affae2bfSwdenk  * This program is free software; you can redistribute it and/or
9affae2bfSwdenk  * modify it under the terms of the GNU General Public License as
10affae2bfSwdenk  * published by the Free Software Foundation; either version 2 of
11affae2bfSwdenk  * the License, or (at your option) any later version.
12affae2bfSwdenk  *
13affae2bfSwdenk  * This program is distributed in the hope that it will be useful,
14affae2bfSwdenk  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15affae2bfSwdenk  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16affae2bfSwdenk  * GNU General Public License for more details.
17affae2bfSwdenk  *
18affae2bfSwdenk  * You should have received a copy of the GNU General Public License
19affae2bfSwdenk  * along with this program; if not, write to the Free Software
20affae2bfSwdenk  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21affae2bfSwdenk  * MA 02111-1307 USA
22affae2bfSwdenk  */
23affae2bfSwdenk 
24affae2bfSwdenk #ifndef _PCMCIA_H
25affae2bfSwdenk #define _PCMCIA_H
26affae2bfSwdenk 
27affae2bfSwdenk #include <common.h>
28affae2bfSwdenk #include <config.h>
29affae2bfSwdenk 
30affae2bfSwdenk /*
31affae2bfSwdenk  * Allow configuration to select PCMCIA slot,
32affae2bfSwdenk  * or try to generate a useful default
33affae2bfSwdenk  */
34639221c7SJon Loeliger #if defined(CONFIG_CMD_PCMCIA) || \
35639221c7SJon Loeliger     (defined(CONFIG_CMD_IDE) && \
36affae2bfSwdenk 	(defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT) ) )
37affae2bfSwdenk 
38affae2bfSwdenk #if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
39affae2bfSwdenk 
40affae2bfSwdenk 					/* The RPX series use SLOT_B	*/
41affae2bfSwdenk #if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE)
42affae2bfSwdenk # define CONFIG_PCMCIA_SLOT_B
43180d3f74Swdenk #elif defined(CONFIG_ADS)		/* The ADS  board uses SLOT_A	*/
44affae2bfSwdenk # define CONFIG_PCMCIA_SLOT_A
45affae2bfSwdenk #elif defined(CONFIG_FADS)		/* The FADS series are a mess	*/
46180d3f74Swdenk # if defined(CONFIG_MPC86x) || defined(CONFIG_MPC821)
47affae2bfSwdenk #  define CONFIG_PCMCIA_SLOT_A
48affae2bfSwdenk # else
49affae2bfSwdenk #  define CONFIG_PCMCIA_SLOT_B
50affae2bfSwdenk # endif
51dc7c9a1aSwdenk #elif defined(CONFIG_TQM8xxL) || defined(CONFIG_SVM_SC8xx)
52affae2bfSwdenk # define	CONFIG_PCMCIA_SLOT_B	/* The TQM8xxL use SLOT_B	*/
53affae2bfSwdenk #elif defined(CONFIG_SPD823TS)		/* The SPD8xx  use SLOT_B	*/
54affae2bfSwdenk # define CONFIG_PCMCIA_SLOT_B
55affae2bfSwdenk #elif defined(CONFIG_IVMS8) || defined(CONFIG_IVML24)	/* The IVM* use SLOT_A	*/
56affae2bfSwdenk # define CONFIG_PCMCIA_SLOT_A
57affae2bfSwdenk #elif defined(CONFIG_LWMON)		/* The LWMON  use SLOT_B	*/
58affae2bfSwdenk # define CONFIG_PCMCIA_SLOT_B
59affae2bfSwdenk #elif defined(CONFIG_ICU862)		/* The ICU862 use SLOT_B	*/
60affae2bfSwdenk # define CONFIG_PCMCIA_SLOT_B
61affae2bfSwdenk #elif defined(CONFIG_C2MON)		/* The C2MON  use SLOT_B	*/
62affae2bfSwdenk # define CONFIG_PCMCIA_SLOT_B
63affae2bfSwdenk #elif defined(CONFIG_R360MPI)		/* The R360MPI use SLOT_B	*/
64affae2bfSwdenk # define CONFIG_PCMCIA_SLOT_B
6566fd3d1cSwdenk #elif defined(CONFIG_ATC)		/* The ATC use SLOT_A	*/
6666fd3d1cSwdenk # define CONFIG_PCMCIA_SLOT_A
6704a85b3bSwdenk #elif defined(CONFIG_NETTA)
6804a85b3bSwdenk # define CONFIG_PCMCIA_SLOT_A
69f7d1572bSwdenk #elif defined(CONFIG_UC100)		/* The UC100 use SLOT_B	        */
70f7d1572bSwdenk # define CONFIG_PCMCIA_SLOT_B
71affae2bfSwdenk #else
72affae2bfSwdenk # error "PCMCIA Slot not configured"
73affae2bfSwdenk #endif
74affae2bfSwdenk 
75affae2bfSwdenk #endif /* !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) */
76affae2bfSwdenk 
77affae2bfSwdenk /* Make sure exactly one slot is defined - we support only one for now */
78affae2bfSwdenk #if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
79affae2bfSwdenk #error Neither CONFIG_PCMCIA_SLOT_A nor CONFIG_PCMCIA_SLOT_B configured
80affae2bfSwdenk #endif
81affae2bfSwdenk #if defined(CONFIG_PCMCIA_SLOT_A) && defined(CONFIG_PCMCIA_SLOT_B)
82affae2bfSwdenk #error Both CONFIG_PCMCIA_SLOT_A and CONFIG_PCMCIA_SLOT_B configured
83affae2bfSwdenk #endif
84affae2bfSwdenk 
85ea909b76Swdenk #ifndef PCMCIA_SOCKETS_NO
86affae2bfSwdenk #define PCMCIA_SOCKETS_NO	1
87ea909b76Swdenk #endif
88ea909b76Swdenk #ifndef PCMCIA_MEM_WIN_NO
89affae2bfSwdenk #define PCMCIA_MEM_WIN_NO	4
90ea909b76Swdenk #endif
91affae2bfSwdenk #define PCMCIA_IO_WIN_NO	2
92affae2bfSwdenk 
93affae2bfSwdenk /* define _slot_ to be able to optimize macros */
94affae2bfSwdenk #ifdef CONFIG_PCMCIA_SLOT_A
95affae2bfSwdenk # define _slot_			0
96affae2bfSwdenk # define PCMCIA_SLOT_MSG	"slot A"
97affae2bfSwdenk # define PCMCIA_SLOT_x		PCMCIA_PSLOT_A
98affae2bfSwdenk #else
99affae2bfSwdenk # define _slot_			1
100affae2bfSwdenk # define PCMCIA_SLOT_MSG	"slot B"
101affae2bfSwdenk # define PCMCIA_SLOT_x		PCMCIA_PSLOT_B
102affae2bfSwdenk #endif
103affae2bfSwdenk 
104affae2bfSwdenk /*
105affae2bfSwdenk  * The TQM850L hardware has two pins swapped! Grrrrgh!
106affae2bfSwdenk  */
107affae2bfSwdenk #ifdef	CONFIG_TQM850L
108affae2bfSwdenk #define __MY_PCMCIA_GCRX_CXRESET	PCMCIA_GCRX_CXOE
109affae2bfSwdenk #define __MY_PCMCIA_GCRX_CXOE		PCMCIA_GCRX_CXRESET
110affae2bfSwdenk #else
111affae2bfSwdenk #define __MY_PCMCIA_GCRX_CXRESET	PCMCIA_GCRX_CXRESET
112affae2bfSwdenk #define __MY_PCMCIA_GCRX_CXOE		PCMCIA_GCRX_CXOE
113affae2bfSwdenk #endif
114affae2bfSwdenk 
115affae2bfSwdenk /*
116affae2bfSwdenk  * This structure is used to address each window in the PCMCIA controller.
117affae2bfSwdenk  *
118affae2bfSwdenk  * Keep in mind that we assume that pcmcia_win_t[n+1] is mapped directly
119affae2bfSwdenk  * after pcmcia_win_t[n]...
120affae2bfSwdenk  */
121affae2bfSwdenk 
122affae2bfSwdenk typedef struct {
123affae2bfSwdenk 	ulong	br;
124affae2bfSwdenk 	ulong	or;
125affae2bfSwdenk } pcmcia_win_t;
126affae2bfSwdenk 
127affae2bfSwdenk /*
128affae2bfSwdenk  * Definitions for PCMCIA control registers to operate in IDE mode
129affae2bfSwdenk  *
130affae2bfSwdenk  * All timing related setup (PCMCIA_SHT, PCMCIA_SST, PCMCIA_SL)
131affae2bfSwdenk  * to be done later (depending on CPU clock)
132affae2bfSwdenk  */
133affae2bfSwdenk 
134affae2bfSwdenk /* Window 0:
135affae2bfSwdenk  *	Base: 0xFE100000	CS1
136affae2bfSwdenk  *	Port Size:     2 Bytes
137affae2bfSwdenk  *	Port Size:    16 Bit
138affae2bfSwdenk  *	Common Memory Space
139affae2bfSwdenk  */
140affae2bfSwdenk 
141affae2bfSwdenk #define CFG_PCMCIA_PBR0		0xFE100000
142affae2bfSwdenk #define CFG_PCMCIA_POR0	    (	PCMCIA_BSIZE_2	\
143affae2bfSwdenk 			    |	PCMCIA_PPS_16	\
144affae2bfSwdenk 			    |	PCMCIA_PRS_MEM	\
145affae2bfSwdenk 			    |	PCMCIA_SLOT_x	\
146affae2bfSwdenk 			    |	PCMCIA_PV	\
147affae2bfSwdenk 			    )
148affae2bfSwdenk 
149affae2bfSwdenk /* Window 1:
150affae2bfSwdenk  *	Base: 0xFE100080	CS1
151affae2bfSwdenk  *	Port Size:     8 Bytes
152affae2bfSwdenk  *	Port Size:     8 Bit
153affae2bfSwdenk  *	Common Memory Space
154affae2bfSwdenk  */
155affae2bfSwdenk 
156affae2bfSwdenk #define CFG_PCMCIA_PBR1		0xFE100080
157affae2bfSwdenk #define CFG_PCMCIA_POR1	    (	PCMCIA_BSIZE_8	\
158affae2bfSwdenk 			    |	PCMCIA_PPS_8	\
159affae2bfSwdenk 			    |	PCMCIA_PRS_MEM	\
160affae2bfSwdenk 			    |	PCMCIA_SLOT_x	\
161affae2bfSwdenk 			    |	PCMCIA_PV	\
162affae2bfSwdenk 			    )
163affae2bfSwdenk 
164affae2bfSwdenk /* Window 2:
165affae2bfSwdenk  *	Base: 0xFE100100	CS2
166affae2bfSwdenk  *	Port Size:     8 Bytes
167affae2bfSwdenk  *	Port Size:     8 Bit
168affae2bfSwdenk  *	Common Memory Space
169affae2bfSwdenk  */
170affae2bfSwdenk 
171affae2bfSwdenk #define CFG_PCMCIA_PBR2		0xFE100100
172affae2bfSwdenk #define CFG_PCMCIA_POR2	    (	PCMCIA_BSIZE_8	\
173affae2bfSwdenk 			    |	PCMCIA_PPS_8	\
174affae2bfSwdenk 			    |	PCMCIA_PRS_MEM	\
175affae2bfSwdenk 			    |	PCMCIA_SLOT_x	\
176affae2bfSwdenk 			    |	PCMCIA_PV	\
177affae2bfSwdenk 			    )
178affae2bfSwdenk 
179affae2bfSwdenk /* Window 3:
180affae2bfSwdenk  *	not used
181affae2bfSwdenk  */
182affae2bfSwdenk #define CFG_PCMCIA_PBR3		0
183affae2bfSwdenk #define CFG_PCMCIA_POR3		0
184affae2bfSwdenk 
185affae2bfSwdenk /* Window 4:
186affae2bfSwdenk  *	Base: 0xFE100C00	CS1
187affae2bfSwdenk  *	Port Size:     2 Bytes
188affae2bfSwdenk  *	Port Size:    16 Bit
189affae2bfSwdenk  *	Common Memory Space
190affae2bfSwdenk  */
191affae2bfSwdenk 
192affae2bfSwdenk #define CFG_PCMCIA_PBR4		0xFE100C00
193affae2bfSwdenk #define CFG_PCMCIA_POR4	    (	PCMCIA_BSIZE_2	\
194affae2bfSwdenk 			    |	PCMCIA_PPS_16	\
195affae2bfSwdenk 			    |	PCMCIA_PRS_MEM	\
196affae2bfSwdenk 			    |	PCMCIA_SLOT_x	\
197affae2bfSwdenk 			    |	PCMCIA_PV	\
198affae2bfSwdenk 			    )
199affae2bfSwdenk 
200affae2bfSwdenk /* Window 5:
201affae2bfSwdenk  *	Base: 0xFE100C80	CS1
202affae2bfSwdenk  *	Port Size:     8 Bytes
203affae2bfSwdenk  *	Port Size:     8 Bit
204affae2bfSwdenk  *	Common Memory Space
205affae2bfSwdenk  */
206affae2bfSwdenk 
207affae2bfSwdenk #define CFG_PCMCIA_PBR5		0xFE100C80
208affae2bfSwdenk #define CFG_PCMCIA_POR5	    (	PCMCIA_BSIZE_8	\
209affae2bfSwdenk 			    |	PCMCIA_PPS_8	\
210affae2bfSwdenk 			    |	PCMCIA_PRS_MEM	\
211affae2bfSwdenk 			    |	PCMCIA_SLOT_x	\
212affae2bfSwdenk 			    |	PCMCIA_PV	\
213affae2bfSwdenk 			    )
214affae2bfSwdenk 
215affae2bfSwdenk /* Window 6:
216affae2bfSwdenk  *	Base: 0xFE100D00	CS2
217affae2bfSwdenk  *	Port Size:     8 Bytes
218affae2bfSwdenk  *	Port Size:     8 Bit
219affae2bfSwdenk  *	Common Memory Space
220affae2bfSwdenk  */
221affae2bfSwdenk 
222affae2bfSwdenk #define CFG_PCMCIA_PBR6		0xFE100D00
223affae2bfSwdenk #define CFG_PCMCIA_POR6	    (	PCMCIA_BSIZE_8	\
224affae2bfSwdenk 			    |	PCMCIA_PPS_8	\
225affae2bfSwdenk 			    |	PCMCIA_PRS_MEM	\
226affae2bfSwdenk 			    |	PCMCIA_SLOT_x	\
227affae2bfSwdenk 			    |	PCMCIA_PV	\
228affae2bfSwdenk 			    )
229affae2bfSwdenk 
230affae2bfSwdenk /* Window 7:
231affae2bfSwdenk  *	not used
232affae2bfSwdenk  */
233affae2bfSwdenk #define CFG_PCMCIA_PBR7		0
234affae2bfSwdenk #define CFG_PCMCIA_POR7		0
235affae2bfSwdenk 
236affae2bfSwdenk /**********************************************************************/
237affae2bfSwdenk 
238affae2bfSwdenk /*
239affae2bfSwdenk  * CIS Tupel codes
240affae2bfSwdenk  */
241affae2bfSwdenk #define CISTPL_NULL		0x00
242affae2bfSwdenk #define CISTPL_DEVICE		0x01
243affae2bfSwdenk #define CISTPL_LONGLINK_CB	0x02
244affae2bfSwdenk #define CISTPL_INDIRECT		0x03
245affae2bfSwdenk #define CISTPL_CONFIG_CB	0x04
246affae2bfSwdenk #define CISTPL_CFTABLE_ENTRY_CB 0x05
247affae2bfSwdenk #define CISTPL_LONGLINK_MFC	0x06
248affae2bfSwdenk #define CISTPL_BAR		0x07
249affae2bfSwdenk #define CISTPL_PWR_MGMNT	0x08
250affae2bfSwdenk #define CISTPL_EXTDEVICE	0x09
251affae2bfSwdenk #define CISTPL_CHECKSUM		0x10
252affae2bfSwdenk #define CISTPL_LONGLINK_A	0x11
253affae2bfSwdenk #define CISTPL_LONGLINK_C	0x12
254affae2bfSwdenk #define CISTPL_LINKTARGET	0x13
255affae2bfSwdenk #define CISTPL_NO_LINK		0x14
256affae2bfSwdenk #define CISTPL_VERS_1		0x15
257affae2bfSwdenk #define CISTPL_ALTSTR		0x16
258affae2bfSwdenk #define CISTPL_DEVICE_A		0x17
259affae2bfSwdenk #define CISTPL_JEDEC_C		0x18
260affae2bfSwdenk #define CISTPL_JEDEC_A		0x19
261affae2bfSwdenk #define CISTPL_CONFIG		0x1a
262affae2bfSwdenk #define CISTPL_CFTABLE_ENTRY	0x1b
263affae2bfSwdenk #define CISTPL_DEVICE_OC	0x1c
264affae2bfSwdenk #define CISTPL_DEVICE_OA	0x1d
265affae2bfSwdenk #define CISTPL_DEVICE_GEO	0x1e
266affae2bfSwdenk #define CISTPL_DEVICE_GEO_A	0x1f
267affae2bfSwdenk #define CISTPL_MANFID		0x20
268affae2bfSwdenk #define CISTPL_FUNCID		0x21
269affae2bfSwdenk #define CISTPL_FUNCE		0x22
270affae2bfSwdenk #define CISTPL_SWIL		0x23
271affae2bfSwdenk #define CISTPL_END		0xff
272affae2bfSwdenk 
273affae2bfSwdenk /*
274affae2bfSwdenk  * CIS Function ID codes
275affae2bfSwdenk  */
276affae2bfSwdenk #define CISTPL_FUNCID_MULTI	0x00
277affae2bfSwdenk #define CISTPL_FUNCID_MEMORY	0x01
278affae2bfSwdenk #define CISTPL_FUNCID_SERIAL	0x02
279affae2bfSwdenk #define CISTPL_FUNCID_PARALLEL	0x03
280affae2bfSwdenk #define CISTPL_FUNCID_FIXED	0x04
281affae2bfSwdenk #define CISTPL_FUNCID_VIDEO	0x05
282affae2bfSwdenk #define CISTPL_FUNCID_NETWORK	0x06
283affae2bfSwdenk #define CISTPL_FUNCID_AIMS	0x07
284affae2bfSwdenk #define CISTPL_FUNCID_SCSI	0x08
285affae2bfSwdenk 
286affae2bfSwdenk /*
287affae2bfSwdenk  * Fixed Disk FUNCE codes
288affae2bfSwdenk  */
289affae2bfSwdenk #define CISTPL_IDE_INTERFACE	0x01
290affae2bfSwdenk 
291affae2bfSwdenk #define CISTPL_FUNCE_IDE_IFACE	0x01
292affae2bfSwdenk #define CISTPL_FUNCE_IDE_MASTER	0x02
293affae2bfSwdenk #define CISTPL_FUNCE_IDE_SLAVE	0x03
294affae2bfSwdenk 
295affae2bfSwdenk /* First feature byte */
296affae2bfSwdenk #define CISTPL_IDE_SILICON	0x04
297affae2bfSwdenk #define CISTPL_IDE_UNIQUE	0x08
298affae2bfSwdenk #define CISTPL_IDE_DUAL		0x10
299affae2bfSwdenk 
300affae2bfSwdenk /* Second feature byte */
301affae2bfSwdenk #define CISTPL_IDE_HAS_SLEEP	0x01
302affae2bfSwdenk #define CISTPL_IDE_HAS_STANDBY	0x02
303affae2bfSwdenk #define CISTPL_IDE_HAS_IDLE	0x04
304affae2bfSwdenk #define CISTPL_IDE_LOW_POWER	0x08
305affae2bfSwdenk #define CISTPL_IDE_REG_INHIBIT	0x10
306affae2bfSwdenk #define CISTPL_IDE_HAS_INDEX	0x20
307affae2bfSwdenk #define CISTPL_IDE_IOIS16	0x40
308affae2bfSwdenk 
309*068b60a0SJon Loeliger #endif
310affae2bfSwdenk 
3119d407995SWolfgang Denk #ifdef	CONFIG_8xx
3129d407995SWolfgang Denk extern u_int *pcmcia_pgcrx[];
3139d407995SWolfgang Denk #define	PCMCIA_PGCRX(slot)	(*pcmcia_pgcrx[slot])
3149d407995SWolfgang Denk #endif
3159d407995SWolfgang Denk 
316639221c7SJon Loeliger #if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD) \
3179d407995SWolfgang Denk 	|| defined(CONFIG_PXA_PCMCIA)
3189d407995SWolfgang Denk extern int check_ide_device(int slot);
3199d407995SWolfgang Denk #endif
3209d407995SWolfgang Denk 
321affae2bfSwdenk #endif /* _PCMCIA_H */
322