1cb199102SNishanth Menon /* 2cb199102SNishanth Menon * (C) Copyright 2012-2013 3cb199102SNishanth Menon * Texas Instruments, <www.ti.com> 4cb199102SNishanth Menon * 51a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 6cb199102SNishanth Menon */ 7da2cc454SNishanth Menon #ifndef PALMAS_H 8da2cc454SNishanth Menon #define PALMAS_H 9cb199102SNishanth Menon 10cb199102SNishanth Menon #include <common.h> 11cb199102SNishanth Menon #include <i2c.h> 12cb199102SNishanth Menon 13e9090fa4SLubomir Popov /* I2C chip addresses, TW6035/37 */ 14e9090fa4SLubomir Popov #define TWL603X_CHIP_P1 0x48 /* Page 1 */ 15e9090fa4SLubomir Popov #define TWL603X_CHIP_P2 0x49 /* Page 2 */ 16e9090fa4SLubomir Popov #define TWL603X_CHIP_P3 0x4a /* Page 3 */ 17cb199102SNishanth Menon 18e9090fa4SLubomir Popov /* TPS659038/39 */ 19e9090fa4SLubomir Popov #define TPS65903X_CHIP_P1 0x58 /* Page 1 */ 20e9090fa4SLubomir Popov 21e9090fa4SLubomir Popov /* Page 1 registers (0x1XY translates to page 1, reg addr 0xXY): */ 22e9090fa4SLubomir Popov 23e9090fa4SLubomir Popov /* LDO1 control/voltage */ 24e9090fa4SLubomir Popov #define LDO1_CTRL 0x50 25e9090fa4SLubomir Popov #define LDO1_VOLTAGE 0x51 26e9090fa4SLubomir Popov 27e9090fa4SLubomir Popov /* LDO9 control/voltage */ 28cb199102SNishanth Menon #define LDO9_CTRL 0x60 29cb199102SNishanth Menon #define LDO9_VOLTAGE 0x61 30cb199102SNishanth Menon 31e9090fa4SLubomir Popov /* LDOUSB control/voltage */ 32e9090fa4SLubomir Popov #define LDOUSB_CTRL 0x64 33e9090fa4SLubomir Popov #define LDOUSB_VOLTAGE 0x65 34*1bd435bcSDan Murphy #define LDO_CTRL 0x6a 35e9090fa4SLubomir Popov 36e9090fa4SLubomir Popov /* Control of 32 kHz audio clock */ 37e9090fa4SLubomir Popov #define CLK32KGAUDIO_CTRL 0xd5 38e9090fa4SLubomir Popov 39e9090fa4SLubomir Popov /* SYSEN2_CTRL for VCC_3v3_AUX supply on the sEVM */ 40e9090fa4SLubomir Popov #define SYSEN2_CTRL 0xd9 41e9090fa4SLubomir Popov 42e9090fa4SLubomir Popov /* 43e9090fa4SLubomir Popov * Bit field definitions for LDOx_CTRL, SYSENx_CTRL 44e9090fa4SLubomir Popov * and some other xxx_CTRL resources: 45e9090fa4SLubomir Popov */ 46e9090fa4SLubomir Popov #define LDO9_BYP_EN (1 << 6) /* LDO9 only! */ 47e9090fa4SLubomir Popov #define RSC_STAT_ON (1 << 4) /* RO status bit! */ 48e9090fa4SLubomir Popov #define RSC_MODE_SLEEP (1 << 2) 49e9090fa4SLubomir Popov #define RSC_MODE_ACTIVE (1 << 0) 50e9090fa4SLubomir Popov 51e9090fa4SLubomir Popov /* Some LDO voltage values */ 52e9090fa4SLubomir Popov #define LDO_VOLT_OFF 0 53e9090fa4SLubomir Popov #define LDO_VOLT_1V8 0x13 54e9090fa4SLubomir Popov #define LDO_VOLT_3V0 0x2b 55e9090fa4SLubomir Popov #define LDO_VOLT_3V3 0x31 56e9090fa4SLubomir Popov /* Request bypass, LDO9 only */ 57e9090fa4SLubomir Popov #define LDO9_BYPASS 0x3f 58e9090fa4SLubomir Popov 59e9090fa4SLubomir Popov /* SMPS7_CTRL */ 60e9090fa4SLubomir Popov #define SMPS7_CTRL 0x30 61e9090fa4SLubomir Popov 62e9090fa4SLubomir Popov /* SMPS9_CTRL */ 63e9090fa4SLubomir Popov #define SMPS9_CTRL 0x38 64e9090fa4SLubomir Popov #define SMPS9_VOLTAGE 0x3b 65e9090fa4SLubomir Popov 66*1bd435bcSDan Murphy /* SMPS10_CTRL */ 67*1bd435bcSDan Murphy #define SMPS10_CTRL 0x3c 68*1bd435bcSDan Murphy #define SMPS10_MODE_ACTIVE_D 0x0d 69*1bd435bcSDan Murphy 70e9090fa4SLubomir Popov /* Bit field definitions for SMPSx_CTRL */ 71e9090fa4SLubomir Popov #define SMPS_MODE_ACT_AUTO 1 72e9090fa4SLubomir Popov #define SMPS_MODE_ACT_ECO 2 73e9090fa4SLubomir Popov #define SMPS_MODE_ACT_FPWM 3 74e9090fa4SLubomir Popov #define SMPS_MODE_SLP_AUTO (1 << 2) 75e9090fa4SLubomir Popov #define SMPS_MODE_SLP_ECO (2 << 2) 76e9090fa4SLubomir Popov #define SMPS_MODE_SLP_FPWM (3 << 2) 77e9090fa4SLubomir Popov 78e9090fa4SLubomir Popov /* 79e9090fa4SLubomir Popov * Some popular SMPS voltages, all with RANGE=1; note 80e9090fa4SLubomir Popov * that RANGE cannot be changed on the fly 81e9090fa4SLubomir Popov */ 82e9090fa4SLubomir Popov #define SMPS_VOLT_OFF 0 83e9090fa4SLubomir Popov #define SMPS_VOLT_1V2 0x90 84e9090fa4SLubomir Popov #define SMPS_VOLT_1V8 0xae 85e9090fa4SLubomir Popov #define SMPS_VOLT_2V1 0xbd 86e9090fa4SLubomir Popov #define SMPS_VOLT_3V0 0xea 87e9090fa4SLubomir Popov #define SMPS_VOLT_3V3 0xf9 88e9090fa4SLubomir Popov 89e9090fa4SLubomir Popov /* Backup Battery & VRTC Control */ 90e9090fa4SLubomir Popov #define BB_VRTC_CTRL 0xa8 91e9090fa4SLubomir Popov /* Bit definitions for BB_VRTC_CTRL */ 92e9090fa4SLubomir Popov #define VRTC_EN_SLP (1 << 6) 93e9090fa4SLubomir Popov #define VRTC_EN_OFF (1 << 5) 94e9090fa4SLubomir Popov #define VRTC_PWEN (1 << 4) 95e9090fa4SLubomir Popov #define BB_LOW_ICHRG (1 << 3) 96e9090fa4SLubomir Popov #define BB_HIGH_ICHRG (0 << 3) 97e9090fa4SLubomir Popov #define BB_VSEL_3V0 (0 << 1) 98e9090fa4SLubomir Popov #define BB_VSEL_2V5 (1 << 1) 99e9090fa4SLubomir Popov #define BB_VSEL_3V15 (2 << 1) 100e9090fa4SLubomir Popov #define BB_VSEL_VBAT (3 << 1) 101e9090fa4SLubomir Popov #define BB_CHRG_EN (1 << 0) 102cb199102SNishanth Menon 103ff2d57eaSNishanth Menon /* 104ff2d57eaSNishanth Menon * Functions to read and write from TPS659038/TWL6035/TWL6037 105ff2d57eaSNishanth Menon * or other Palmas family of TI PMICs 106ff2d57eaSNishanth Menon */ 107ff2d57eaSNishanth Menon static inline int palmas_i2c_write_u8(u8 chip_no, u8 reg, u8 val) 108ff2d57eaSNishanth Menon { 109ff2d57eaSNishanth Menon return i2c_write(chip_no, reg, 1, &val, 1); 110ff2d57eaSNishanth Menon } 111ff2d57eaSNishanth Menon 112ff2d57eaSNishanth Menon static inline int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val) 113ff2d57eaSNishanth Menon { 114ff2d57eaSNishanth Menon return i2c_read(chip_no, reg, 1, val, 1); 115ff2d57eaSNishanth Menon } 116ff2d57eaSNishanth Menon 11712733881SNishanth Menon void palmas_init_settings(void); 118384bcae0SNishanth Menon int palmas_mmc1_poweron_ldo(void); 119e9090fa4SLubomir Popov int twl603x_mmc1_set_ldo9(u8 vsel); 120e9090fa4SLubomir Popov int twl603x_audio_power(u8 on); 121e9090fa4SLubomir Popov int twl603x_enable_bb_charge(u8 bb_fields); 122*1bd435bcSDan Murphy int palmas_enable_ss_ldo(void); 123da2cc454SNishanth Menon 124da2cc454SNishanth Menon #endif /* PALMAS_H */ 125