1cb199102SNishanth Menon /*
2cb199102SNishanth Menon * (C) Copyright 2012-2013
3cb199102SNishanth Menon * Texas Instruments, <www.ti.com>
4cb199102SNishanth Menon *
51a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+
6cb199102SNishanth Menon */
7da2cc454SNishanth Menon #ifndef PALMAS_H
8da2cc454SNishanth Menon #define PALMAS_H
9cb199102SNishanth Menon
10cb199102SNishanth Menon #include <common.h>
11cb199102SNishanth Menon #include <i2c.h>
12cb199102SNishanth Menon
13e9090fa4SLubomir Popov /* I2C chip addresses, TW6035/37 */
14e9090fa4SLubomir Popov #define TWL603X_CHIP_P1 0x48 /* Page 1 */
15e9090fa4SLubomir Popov #define TWL603X_CHIP_P2 0x49 /* Page 2 */
16e9090fa4SLubomir Popov #define TWL603X_CHIP_P3 0x4a /* Page 3 */
17cb199102SNishanth Menon
18e9090fa4SLubomir Popov /* TPS659038/39 */
19e9090fa4SLubomir Popov #define TPS65903X_CHIP_P1 0x58 /* Page 1 */
20e9090fa4SLubomir Popov
21e9090fa4SLubomir Popov /* Page 1 registers (0x1XY translates to page 1, reg addr 0xXY): */
22e9090fa4SLubomir Popov
23e9090fa4SLubomir Popov /* LDO1 control/voltage */
24e9090fa4SLubomir Popov #define LDO1_CTRL 0x50
25e9090fa4SLubomir Popov #define LDO1_VOLTAGE 0x51
26e9090fa4SLubomir Popov
27*b4b06006SLokesh Vutla /* LDO1 control/voltage for LP873x */
28*b4b06006SLokesh Vutla #define LP873X_LDO1_ADDR 0x60
29*b4b06006SLokesh Vutla #define LP873X_LDO1_CTRL 0x9
30*b4b06006SLokesh Vutla #define LP873X_LDO1_VOLTAGE 0xa
31*b4b06006SLokesh Vutla #define LP873X_LDO_VOLT_3V0 0x19
32*b4b06006SLokesh Vutla #define LP873X_LDO_VOLT_1V8 0xa
33*b4b06006SLokesh Vutla #define LP873X_LDO_CTRL_EN (0x1 << 0)
34*b4b06006SLokesh Vutla #define LP873X_LDO_CTRL_EN_PINCTRL (0x1 << 1)
35*b4b06006SLokesh Vutla #define LP873X_LDO_CTRL_RDIS_EN (0x1 << 2)
36*b4b06006SLokesh Vutla
3735fe1cb0SDmitry Lifshitz /* LDO2 control/voltage */
3835fe1cb0SDmitry Lifshitz #define LDO2_CTRL 0x52
3935fe1cb0SDmitry Lifshitz #define LDO2_VOLTAGE 0x53
4035fe1cb0SDmitry Lifshitz
41e9090fa4SLubomir Popov /* LDO9 control/voltage */
42cb199102SNishanth Menon #define LDO9_CTRL 0x60
43cb199102SNishanth Menon #define LDO9_VOLTAGE 0x61
44cb199102SNishanth Menon
45e9090fa4SLubomir Popov /* LDOUSB control/voltage */
46e9090fa4SLubomir Popov #define LDOUSB_CTRL 0x64
47e9090fa4SLubomir Popov #define LDOUSB_VOLTAGE 0x65
481bd435bcSDan Murphy #define LDO_CTRL 0x6a
49e9090fa4SLubomir Popov
50e9090fa4SLubomir Popov /* Control of 32 kHz audio clock */
51e9090fa4SLubomir Popov #define CLK32KGAUDIO_CTRL 0xd5
52e9090fa4SLubomir Popov
53e9090fa4SLubomir Popov /* SYSEN2_CTRL for VCC_3v3_AUX supply on the sEVM */
54e9090fa4SLubomir Popov #define SYSEN2_CTRL 0xd9
55e9090fa4SLubomir Popov
56e9090fa4SLubomir Popov /*
57e9090fa4SLubomir Popov * Bit field definitions for LDOx_CTRL, SYSENx_CTRL
58e9090fa4SLubomir Popov * and some other xxx_CTRL resources:
59e9090fa4SLubomir Popov */
60e9090fa4SLubomir Popov #define LDO9_BYP_EN (1 << 6) /* LDO9 only! */
61e9090fa4SLubomir Popov #define RSC_STAT_ON (1 << 4) /* RO status bit! */
62e9090fa4SLubomir Popov #define RSC_MODE_SLEEP (1 << 2)
63e9090fa4SLubomir Popov #define RSC_MODE_ACTIVE (1 << 0)
64e9090fa4SLubomir Popov
65e9090fa4SLubomir Popov /* Some LDO voltage values */
66e9090fa4SLubomir Popov #define LDO_VOLT_OFF 0
67e9090fa4SLubomir Popov #define LDO_VOLT_1V8 0x13
68e9090fa4SLubomir Popov #define LDO_VOLT_3V0 0x2b
69e9090fa4SLubomir Popov #define LDO_VOLT_3V3 0x31
70e9090fa4SLubomir Popov /* Request bypass, LDO9 only */
71e9090fa4SLubomir Popov #define LDO9_BYPASS 0x3f
72e9090fa4SLubomir Popov
73e9090fa4SLubomir Popov /* SMPS7_CTRL */
74e9090fa4SLubomir Popov #define SMPS7_CTRL 0x30
75e9090fa4SLubomir Popov
76e9090fa4SLubomir Popov /* SMPS9_CTRL */
77e9090fa4SLubomir Popov #define SMPS9_CTRL 0x38
78e9090fa4SLubomir Popov #define SMPS9_VOLTAGE 0x3b
79e9090fa4SLubomir Popov
801bd435bcSDan Murphy /* SMPS10_CTRL */
811bd435bcSDan Murphy #define SMPS10_CTRL 0x3c
821bd435bcSDan Murphy #define SMPS10_MODE_ACTIVE_D 0x0d
831bd435bcSDan Murphy
84e9090fa4SLubomir Popov /* Bit field definitions for SMPSx_CTRL */
85e9090fa4SLubomir Popov #define SMPS_MODE_ACT_AUTO 1
86e9090fa4SLubomir Popov #define SMPS_MODE_ACT_ECO 2
87e9090fa4SLubomir Popov #define SMPS_MODE_ACT_FPWM 3
88e9090fa4SLubomir Popov #define SMPS_MODE_SLP_AUTO (1 << 2)
89e9090fa4SLubomir Popov #define SMPS_MODE_SLP_ECO (2 << 2)
90e9090fa4SLubomir Popov #define SMPS_MODE_SLP_FPWM (3 << 2)
91e9090fa4SLubomir Popov
92e9090fa4SLubomir Popov /*
93e9090fa4SLubomir Popov * Some popular SMPS voltages, all with RANGE=1; note
94e9090fa4SLubomir Popov * that RANGE cannot be changed on the fly
95e9090fa4SLubomir Popov */
96e9090fa4SLubomir Popov #define SMPS_VOLT_OFF 0
97e9090fa4SLubomir Popov #define SMPS_VOLT_1V2 0x90
98e9090fa4SLubomir Popov #define SMPS_VOLT_1V8 0xae
99e9090fa4SLubomir Popov #define SMPS_VOLT_2V1 0xbd
100e9090fa4SLubomir Popov #define SMPS_VOLT_3V0 0xea
101e9090fa4SLubomir Popov #define SMPS_VOLT_3V3 0xf9
102e9090fa4SLubomir Popov
103e9090fa4SLubomir Popov /* Backup Battery & VRTC Control */
104e9090fa4SLubomir Popov #define BB_VRTC_CTRL 0xa8
105e9090fa4SLubomir Popov /* Bit definitions for BB_VRTC_CTRL */
106e9090fa4SLubomir Popov #define VRTC_EN_SLP (1 << 6)
107e9090fa4SLubomir Popov #define VRTC_EN_OFF (1 << 5)
108e9090fa4SLubomir Popov #define VRTC_PWEN (1 << 4)
109e9090fa4SLubomir Popov #define BB_LOW_ICHRG (1 << 3)
110e9090fa4SLubomir Popov #define BB_HIGH_ICHRG (0 << 3)
111e9090fa4SLubomir Popov #define BB_VSEL_3V0 (0 << 1)
112e9090fa4SLubomir Popov #define BB_VSEL_2V5 (1 << 1)
113e9090fa4SLubomir Popov #define BB_VSEL_3V15 (2 << 1)
114e9090fa4SLubomir Popov #define BB_VSEL_VBAT (3 << 1)
115e9090fa4SLubomir Popov #define BB_CHRG_EN (1 << 0)
116cb199102SNishanth Menon
117ff2d57eaSNishanth Menon /*
118ff2d57eaSNishanth Menon * Functions to read and write from TPS659038/TWL6035/TWL6037
119ff2d57eaSNishanth Menon * or other Palmas family of TI PMICs
120ff2d57eaSNishanth Menon */
palmas_i2c_write_u8(u8 chip_no,u8 reg,u8 val)121ff2d57eaSNishanth Menon static inline int palmas_i2c_write_u8(u8 chip_no, u8 reg, u8 val)
122ff2d57eaSNishanth Menon {
123ff2d57eaSNishanth Menon return i2c_write(chip_no, reg, 1, &val, 1);
124ff2d57eaSNishanth Menon }
125ff2d57eaSNishanth Menon
palmas_i2c_read_u8(u8 chip_no,u8 reg,u8 * val)126ff2d57eaSNishanth Menon static inline int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val)
127ff2d57eaSNishanth Menon {
128ff2d57eaSNishanth Menon return i2c_read(chip_no, reg, 1, val, 1);
129ff2d57eaSNishanth Menon }
130ff2d57eaSNishanth Menon
13112733881SNishanth Menon void palmas_init_settings(void);
132*b4b06006SLokesh Vutla int palmas_mmc1_poweron_ldo(uint voltage);
133*b4b06006SLokesh Vutla int lp873x_mmc1_poweron_ldo(uint voltage);
134e9090fa4SLubomir Popov int twl603x_mmc1_set_ldo9(u8 vsel);
135e9090fa4SLubomir Popov int twl603x_audio_power(u8 on);
136e9090fa4SLubomir Popov int twl603x_enable_bb_charge(u8 bb_fields);
1371bd435bcSDan Murphy int palmas_enable_ss_ldo(void);
138da2cc454SNishanth Menon
139da2cc454SNishanth Menon #endif /* PALMAS_H */
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