189973f8aSBen Warren /* 289973f8aSBen Warren * (C) Copyright 2008 389973f8aSBen Warren * Benjamin Warren, biggerbadderben@gmail.com 489973f8aSBen Warren * 51a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 689973f8aSBen Warren */ 789973f8aSBen Warren 889973f8aSBen Warren /* 989973f8aSBen Warren * netdev.h - definitions an prototypes for network devices 1089973f8aSBen Warren */ 1189973f8aSBen Warren 1289973f8aSBen Warren #ifndef _NETDEV_H_ 1389973f8aSBen Warren #define _NETDEV_H_ 1489973f8aSBen Warren 1589973f8aSBen Warren /* 1689973f8aSBen Warren * Board and CPU-specific initialization functions 1789973f8aSBen Warren * board_eth_init() has highest priority. cpu_eth_init() only 1889973f8aSBen Warren * gets called if board_eth_init() isn't instantiated or fails. 1989973f8aSBen Warren * Return values: 2089973f8aSBen Warren * 0: success 2189973f8aSBen Warren * -1: failure 2289973f8aSBen Warren */ 2389973f8aSBen Warren 2489973f8aSBen Warren int board_eth_init(bd_t *bis); 2589973f8aSBen Warren int cpu_eth_init(bd_t *bis); 2689973f8aSBen Warren 2789973f8aSBen Warren /* Driver initialization prototypes */ 28c960b13eSThomas Chou int altera_tse_initialize(u8 dev_num, int mac_base, 29b962ac79SJoachim Foerster int sgdma_rx_base, int sgdma_tx_base, 30b962ac79SJoachim Foerster u32 sgdma_desc_base, u32 sgdma_desc_size); 31c041e9d2SJens Scharsig int at91emac_register(bd_t *bis, unsigned long iobase); 32bd6ce9d1SWolfgang Denk int au1x00_enet_initialize(bd_t*); 33bd6ce9d1SWolfgang Denk int ax88180_initialize(bd_t *bis); 3489973f8aSBen Warren int bfin_EMAC_initialize(bd_t *bis); 35efdd7319SRob Herring int calxedaxgmac_initialize(u32 id, ulong base_addr); 36b1c0eaacSBen Warren int cs8900_initialize(u8 dev_num, int base_addr); 378453587eSBen Warren int davinci_emac_initialize(void); 38bd6ce9d1SWolfgang Denk int dc21x4x_initialize(bd_t *bis); 3992a190aaSAlexey Brodkin int designware_initialize(ulong base_addr, u32 interface); 40bd6ce9d1SWolfgang Denk int dm9000_initialize(bd_t *bis); 4162cbc408SIlya Yanok int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr); 42ad3381cfSBen Warren int e1000_initialize(bd_t *bis); 4310efa024SBen Warren int eepro100_initialize(bd_t *bis); 44a61a8196SReinhard Meyer int enc28j60_initialize(unsigned int bus, unsigned int cs, 45a61a8196SReinhard Meyer unsigned int max_hz, unsigned int mode); 46594d57d0SMatthias Kaehlcke int ep93xx_eth_initialize(u8 dev_num, int base_addr); 47164846eeSBen Warren int eth_3com_initialize (bd_t * bis); 48bd6ce9d1SWolfgang Denk int ethoc_initialize(u8 dev_num, int base_addr); 493456a148SBen Warren int fec_initialize (bd_t *bis); 500b23fb36SIlya Yanok int fecmxc_initialize(bd_t *bis); 519e27e9dcSMarek Vasut int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr); 52b3dbf4a5SMacpaul Lin int ftgmac100_initialize(bd_t *bits); 53750326e5SPo-Yu Chuang int ftmac100_initialize(bd_t *bits); 54c4775476SKuo-Jung Su int ftmac110_initialize(bd_t *bits); 5589973f8aSBen Warren int greth_initialize(bd_t *bis); 566aca145eSBen Warren void gt6426x_eth_initialize(bd_t *bis); 578218bd2aSBen Warren int inca_switch_initialize(bd_t *bis); 58bd6ce9d1SWolfgang Denk int ks8695_eth_initialize(void); 5945a1693aSRoberto Cerati int ks8851_mll_initialize(u8 dev_num, int base_addr); 60b7ad4109SNishanth Menon int lan91c96_initialize(u8 dev_num, int base_addr); 6189973f8aSBen Warren int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); 6289973f8aSBen Warren int mcdmafec_initialize(bd_t *bis); 6389973f8aSBen Warren int mcffec_initialize(bd_t *bis); 64a0aad08fSBen Warren int mpc512x_fec_initialize(bd_t *bis); 65e1d7480bSBen Warren int mpc5xxx_fec_initialize(bd_t *bis); 66ba705b5bSGary Jennejohn int mpc82xx_scc_enet_initialize(bd_t *bis); 67d44265adSAlbert Aribaud int mvgbe_initialize(bd_t *bis); 68b902b8ddSBen Warren int natsemi_initialize(bd_t *bis); 69d0201692SBernhard Kaindl int ne2k_register(void); 70cc94074eSBen Warren int npe_initialize(bd_t *bis); 7119403633SBen Warren int ns8382x_initialize(bd_t *bis); 72e3090534SBen Warren int pcnet_initialize(bd_t *bis); 734fce2aceSBen Warren int plb2800_eth_initialize(bd_t *bis); 7425a85906SBen Warren int ppc_4xx_eth_initialize (bd_t *bis); 750b252f50SBen Warren int rtl8139_initialize(bd_t *bis); 7602d69891SBen Warren int rtl8169_initialize(bd_t *bis); 779eb79bd8SBen Warren int scc_initialize(bd_t *bis); 78bd6ce9d1SWolfgang Denk int sh_eth_initialize(bd_t *bis); 7989973f8aSBen Warren int skge_initialize(bd_t *bis); 807194ab80SBen Warren int smc91111_initialize(u8 dev_num, int base_addr); 81bd6ce9d1SWolfgang Denk int smc911x_initialize(u8 dev_num, int base_addr); 82518ce472SHenrik Nordström int sunxi_wemac_initialize(bd_t *bis); 83ccdd12f8SBen Warren int tsi108_eth_initialize(bd_t *bis); 842b5243fcSWolfgang Denk int uec_standard_init(bd_t *bis); 8589973f8aSBen Warren int uli526x_initialize(bd_t *bis); 8679788bb1SAjay Bhargav int armada100_fec_register(unsigned long base_addr); 874f1ec4c1SMichal Simek int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr, 884f1ec4c1SMichal Simek unsigned long dma_addr); 89*0c9c99a2SMichal Simek int xilinx_emaclite_of_init(const void *blob); 90c1044a1eSMichal Simek int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, 91c1044a1eSMichal Simek int txpp, int rxpp); 92df482650SStephan Linz int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags, 93df482650SStephan Linz unsigned long ctrl_addr); 9401fbf310SDavid Andrey int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr, u32 emio); 95df482650SStephan Linz /* 96df482650SStephan Linz * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface 97df482650SStephan Linz * exported by a public hader file, we need a global definition at this point. 98df482650SStephan Linz */ 99df482650SStephan Linz #if defined(CONFIG_XILINX_LL_TEMAC) 100df482650SStephan Linz #define XILINX_LL_TEMAC_M_FIFO 0 /* use FIFO Ctrl */ 101df482650SStephan Linz #define XILINX_LL_TEMAC_M_SDMA_PLB (1 << 0)/* use SDMA Ctrl via PLB */ 102df482650SStephan Linz #define XILINX_LL_TEMAC_M_SDMA_DCR (1 << 1)/* use SDMA Ctrl via DCR */ 103df482650SStephan Linz #endif 10489973f8aSBen Warren 10589973f8aSBen Warren /* Boards with PCI network controllers can call this from their board_eth_init() 10689973f8aSBen Warren * function to initialize whatever's on board. 10789973f8aSBen Warren * Return value is total # of devices found */ 10889973f8aSBen Warren 10989973f8aSBen Warren static inline int pci_eth_init(bd_t *bis) 11089973f8aSBen Warren { 11189973f8aSBen Warren int num = 0; 112e3090534SBen Warren 11310efa024SBen Warren #ifdef CONFIG_PCI 11410efa024SBen Warren 11510efa024SBen Warren #ifdef CONFIG_EEPRO100 11610efa024SBen Warren num += eepro100_initialize(bis); 11710efa024SBen Warren #endif 1188ca0b3f9SBen Warren #ifdef CONFIG_TULIP 1198ca0b3f9SBen Warren num += dc21x4x_initialize(bis); 1208ca0b3f9SBen Warren #endif 121ad3381cfSBen Warren #ifdef CONFIG_E1000 122ad3381cfSBen Warren num += e1000_initialize(bis); 123ad3381cfSBen Warren #endif 124e3090534SBen Warren #ifdef CONFIG_PCNET 125e3090534SBen Warren num += pcnet_initialize(bis); 126e3090534SBen Warren #endif 127b902b8ddSBen Warren #ifdef CONFIG_NATSEMI 128b902b8ddSBen Warren num += natsemi_initialize(bis); 129b902b8ddSBen Warren #endif 13019403633SBen Warren #ifdef CONFIG_NS8382X 13119403633SBen Warren num += ns8382x_initialize(bis); 13219403633SBen Warren #endif 1330b252f50SBen Warren #if defined(CONFIG_RTL8139) 1340b252f50SBen Warren num += rtl8139_initialize(bis); 1350b252f50SBen Warren #endif 13602d69891SBen Warren #if defined(CONFIG_RTL8169) 13702d69891SBen Warren num += rtl8169_initialize(bis); 13802d69891SBen Warren #endif 139b11f664fSTimur Tabi #if defined(CONFIG_ULI526X) 14089973f8aSBen Warren num += uli526x_initialize(bis); 14189973f8aSBen Warren #endif 14210efa024SBen Warren 14310efa024SBen Warren #endif /* CONFIG_PCI */ 14489973f8aSBen Warren return num; 14589973f8aSBen Warren } 14689973f8aSBen Warren 1476f51deb7SPrafulla Wadaskar /* 1486f51deb7SPrafulla Wadaskar * Boards with mv88e61xx switch can use this by defining 1496f51deb7SPrafulla Wadaskar * CONFIG_MV88E61XX_SWITCH in respective board configheader file 1506f51deb7SPrafulla Wadaskar * the stuct and enums here are used to specify switch configuration params 1516f51deb7SPrafulla Wadaskar */ 1526f51deb7SPrafulla Wadaskar #if defined(CONFIG_MV88E61XX_SWITCH) 1530a16ea59SAlbert ARIBAUD 1540a16ea59SAlbert ARIBAUD /* constants for any 88E61xx switch */ 1550a16ea59SAlbert ARIBAUD #define MV88E61XX_MAX_PORTS_NUM 6 1566f51deb7SPrafulla Wadaskar 1576f51deb7SPrafulla Wadaskar enum mv88e61xx_cfg_mdip { 1586f51deb7SPrafulla Wadaskar MV88E61XX_MDIP_NOCHANGE, 1596f51deb7SPrafulla Wadaskar MV88E61XX_MDIP_REVERSE 1606f51deb7SPrafulla Wadaskar }; 1616f51deb7SPrafulla Wadaskar 1626f51deb7SPrafulla Wadaskar enum mv88e61xx_cfg_ledinit { 1636f51deb7SPrafulla Wadaskar MV88E61XX_LED_INIT_DIS, 1646f51deb7SPrafulla Wadaskar MV88E61XX_LED_INIT_EN 1656f51deb7SPrafulla Wadaskar }; 1666f51deb7SPrafulla Wadaskar 1676f51deb7SPrafulla Wadaskar enum mv88e61xx_cfg_rgmiid { 1686f51deb7SPrafulla Wadaskar MV88E61XX_RGMII_DELAY_DIS, 1696f51deb7SPrafulla Wadaskar MV88E61XX_RGMII_DELAY_EN 1706f51deb7SPrafulla Wadaskar }; 1716f51deb7SPrafulla Wadaskar 1726f51deb7SPrafulla Wadaskar enum mv88e61xx_cfg_prtstt { 1736f51deb7SPrafulla Wadaskar MV88E61XX_PORTSTT_DISABLED, 1746f51deb7SPrafulla Wadaskar MV88E61XX_PORTSTT_BLOCKING, 1756f51deb7SPrafulla Wadaskar MV88E61XX_PORTSTT_LEARNING, 1766f51deb7SPrafulla Wadaskar MV88E61XX_PORTSTT_FORWARDING 1776f51deb7SPrafulla Wadaskar }; 1786f51deb7SPrafulla Wadaskar 1796f51deb7SPrafulla Wadaskar struct mv88e61xx_config { 1806f51deb7SPrafulla Wadaskar char *name; 1810a16ea59SAlbert ARIBAUD u8 vlancfg[MV88E61XX_MAX_PORTS_NUM]; 1826f51deb7SPrafulla Wadaskar enum mv88e61xx_cfg_rgmiid rgmii_delay; 1836f51deb7SPrafulla Wadaskar enum mv88e61xx_cfg_prtstt portstate; 1846f51deb7SPrafulla Wadaskar enum mv88e61xx_cfg_ledinit led_init; 1856f51deb7SPrafulla Wadaskar enum mv88e61xx_cfg_mdip mdip; 1866f51deb7SPrafulla Wadaskar u32 ports_enabled; 1876f51deb7SPrafulla Wadaskar u8 cpuport; 1886f51deb7SPrafulla Wadaskar }; 1896f51deb7SPrafulla Wadaskar 1900a16ea59SAlbert ARIBAUD /* 1910a16ea59SAlbert ARIBAUD * Common mappings for Internal VLANs 1920a16ea59SAlbert ARIBAUD * These mappings consider that all ports are useable; the driver 1930a16ea59SAlbert ARIBAUD * will mask inexistent/unused ports. 1940a16ea59SAlbert ARIBAUD */ 1950a16ea59SAlbert ARIBAUD 1960a16ea59SAlbert ARIBAUD /* Switch mode : routes any port to any port */ 1970a16ea59SAlbert ARIBAUD #define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F } 1980a16ea59SAlbert ARIBAUD 1990a16ea59SAlbert ARIBAUD /* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */ 2000a16ea59SAlbert ARIBAUD #define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F } 2010a16ea59SAlbert ARIBAUD 2026f51deb7SPrafulla Wadaskar int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig); 2036f51deb7SPrafulla Wadaskar #endif /* CONFIG_MV88E61XX_SWITCH */ 2046f51deb7SPrafulla Wadaskar 205fe428b90STroy Kisky struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id); 206fe428b90STroy Kisky #ifdef CONFIG_PHYLIB 207fe428b90STroy Kisky struct phy_device; 208fe428b90STroy Kisky int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr, 209fe428b90STroy Kisky struct mii_dev *bus, struct phy_device *phydev); 210fe428b90STroy Kisky #else 2112e5f4421SMarek Vasut /* 2122e5f4421SMarek Vasut * Allow FEC to fine-tune MII configuration on boards which require this. 2132e5f4421SMarek Vasut */ 2142e5f4421SMarek Vasut int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)); 215fe428b90STroy Kisky #endif 2162e5f4421SMarek Vasut 21789973f8aSBen Warren #endif /* _NETDEV_H_ */ 218