1e5f495d1SPrafulla Wadaskar /* 2e5f495d1SPrafulla Wadaskar * (C) Copyright 2010 3e5f495d1SPrafulla Wadaskar * Marvell Semiconductor <www.marvell.com> 4e5f495d1SPrafulla Wadaskar * Written-by: Prafulla Wadaskar <prafulla@marvell.com> 5e5f495d1SPrafulla Wadaskar * 6*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 7e5f495d1SPrafulla Wadaskar */ 8e5f495d1SPrafulla Wadaskar 9e5f495d1SPrafulla Wadaskar #ifndef __MVMFP_H 10e5f495d1SPrafulla Wadaskar #define __MVMFP_H 11e5f495d1SPrafulla Wadaskar 12e5f495d1SPrafulla Wadaskar /* 13e5f495d1SPrafulla Wadaskar * Header file for MultiFunctionPin (MFP) Configururation framework 14e5f495d1SPrafulla Wadaskar * 15e5f495d1SPrafulla Wadaskar * Processors Supported: 16e5f495d1SPrafulla Wadaskar * 1. Marvell ARMADA100 Processors 17e5f495d1SPrafulla Wadaskar * 18e5f495d1SPrafulla Wadaskar * processor to be supported should be added here 19e5f495d1SPrafulla Wadaskar */ 20e5f495d1SPrafulla Wadaskar 21e5f495d1SPrafulla Wadaskar /* 22e5f495d1SPrafulla Wadaskar * MFP configuration is represented by a 32-bit unsigned integer 23e5f495d1SPrafulla Wadaskar */ 24e5f495d1SPrafulla Wadaskar #define MFP(_off, _pull, _pF, _drv, _dF, _edge, _eF, _afn, _aF) ( \ 25e5f495d1SPrafulla Wadaskar /* bits 31..16 - MFP Register Offset */ (((_off) & 0xffff) << 16) | \ 26e5f495d1SPrafulla Wadaskar /* bits 15..13 - Run Mode Pull State */ (((_pull) & 0x7) << 13) | \ 27e5f495d1SPrafulla Wadaskar /* bit 12 - Unused */ \ 28e5f495d1SPrafulla Wadaskar /* bits 11..10 - Driver Strength */ (((_drv) & 0x3) << 10) | \ 29e5f495d1SPrafulla Wadaskar /* bit 09 - Pull State flag */ (((_pF) & 0x1) << 9) | \ 30e5f495d1SPrafulla Wadaskar /* bit 08 - Drv-strength flag */ (((_dF) & 0x1) << 8) | \ 31e5f495d1SPrafulla Wadaskar /* bit 07 - Edge-det flag */ (((_eF) & 0x1) << 7) | \ 32e5f495d1SPrafulla Wadaskar /* bits 06..04 - Edge Detection */ (((_edge) & 0x7) << 4) | \ 33e5f495d1SPrafulla Wadaskar /* bits 03..00 - Alt-fun flag */ (((_aF) & 0x1) << 3) | \ 34e5f495d1SPrafulla Wadaskar /* bits Alternate-fun select */ ((_afn) & 0x7)) 35e5f495d1SPrafulla Wadaskar 36e5f495d1SPrafulla Wadaskar /* 37e5f495d1SPrafulla Wadaskar * to facilitate the definition, the following macros are provided 38e5f495d1SPrafulla Wadaskar * 39e5f495d1SPrafulla Wadaskar * offset, pull,pF, drv,dF, edge,eF ,afn,aF 40e5f495d1SPrafulla Wadaskar */ 41e5f495d1SPrafulla Wadaskar #define MFP_OFFSET_MASK MFP(0xffff, 0,0, 0,0, 0,0, 0,0) 42e5f495d1SPrafulla Wadaskar #define MFP_REG(x) MFP(x, 0,0, 0,0, 0,0, 0,0) 43e5f495d1SPrafulla Wadaskar #define MFP_REG_GET_OFFSET(x) ((x & MFP_OFFSET_MASK) >> 16) 44e5f495d1SPrafulla Wadaskar 45e5f495d1SPrafulla Wadaskar #define MFP_AF_FLAG MFP(0x0000, 0,0, 0,0, 0,0, 0,1) 46e5f495d1SPrafulla Wadaskar #define MFP_DRIVE_FLAG MFP(0x0000, 0,0, 0,1, 0,0, 0,0) 47e5f495d1SPrafulla Wadaskar #define MFP_EDGE_FLAG MFP(0x0000, 0,0, 0,0, 0,1, 0,0) 48e5f495d1SPrafulla Wadaskar #define MFP_PULL_FLAG MFP(0x0000, 0,1, 0,0, 0,0, 0,0) 49e5f495d1SPrafulla Wadaskar 50e5f495d1SPrafulla Wadaskar #define MFP_AF0 MFP(0x0000, 0,0, 0,0, 0,0, 0,1) 51e5f495d1SPrafulla Wadaskar #define MFP_AF1 MFP(0x0000, 0,0, 0,0, 0,0, 1,1) 52e5f495d1SPrafulla Wadaskar #define MFP_AF2 MFP(0x0000, 0,0, 0,0, 0,0, 2,1) 53e5f495d1SPrafulla Wadaskar #define MFP_AF3 MFP(0x0000, 0,0, 0,0, 0,0, 3,1) 54e5f495d1SPrafulla Wadaskar #define MFP_AF4 MFP(0x0000, 0,0, 0,0, 0,0, 4,1) 55e5f495d1SPrafulla Wadaskar #define MFP_AF5 MFP(0x0000, 0,0, 0,0, 0,0, 5,1) 56e5f495d1SPrafulla Wadaskar #define MFP_AF6 MFP(0x0000, 0,0, 0,0, 0,0, 6,1) 57e5f495d1SPrafulla Wadaskar #define MFP_AF7 MFP(0x0000, 0,0, 0,0, 0,0, 7,1) 58e5f495d1SPrafulla Wadaskar #define MFP_AF_MASK MFP(0x0000, 0,0, 0,0, 0,0, 7,0) 59e5f495d1SPrafulla Wadaskar 60e5f495d1SPrafulla Wadaskar #define MFP_LPM_EDGE_NONE MFP(0x0000, 0,0, 0,0, 0,1, 0,0) 61e5f495d1SPrafulla Wadaskar #define MFP_LPM_EDGE_RISE MFP(0x0000, 0,0, 0,0, 1,1, 0,0) 62e5f495d1SPrafulla Wadaskar #define MFP_LPM_EDGE_FALL MFP(0x0000, 0,0, 0,0, 2,1, 0,0) 63e5f495d1SPrafulla Wadaskar #define MFP_LPM_EDGE_BOTH MFP(0x0000, 0,0, 0,0, 3,1, 0,0) 64e5f495d1SPrafulla Wadaskar #define MFP_LPM_EDGE_MASK MFP(0x0000, 0,0, 0,0, 3,0, 0,0) 65e5f495d1SPrafulla Wadaskar 66e5f495d1SPrafulla Wadaskar #define MFP_DRIVE_VERY_SLOW MFP(0x0000, 0,0, 0,1, 0,0, 0,0) 67e5f495d1SPrafulla Wadaskar #define MFP_DRIVE_SLOW MFP(0x0000, 0,0, 1,1, 0,0, 0,0) 68e5f495d1SPrafulla Wadaskar #define MFP_DRIVE_MEDIUM MFP(0x0000, 0,0, 2,1, 0,0, 0,0) 69e5f495d1SPrafulla Wadaskar #define MFP_DRIVE_FAST MFP(0x0000, 0,0, 3,1, 0,0, 0,0) 70e5f495d1SPrafulla Wadaskar #define MFP_DRIVE_MASK MFP(0x0000, 0,0, 3,0, 0,0, 0,0) 71e5f495d1SPrafulla Wadaskar 72e5f495d1SPrafulla Wadaskar #define MFP_PULL_NONE MFP(0x0000, 0,1, 0,0, 0,0, 0,0) 73e5f495d1SPrafulla Wadaskar #define MFP_PULL_LOW MFP(0x0000, 1,1, 0,0, 0,0, 0,0) 74e5f495d1SPrafulla Wadaskar #define MFP_PULL_HIGH MFP(0x0000, 2,1, 0,0, 0,0, 0,0) 75e5f495d1SPrafulla Wadaskar #define MFP_PULL_BOTH MFP(0x0000, 3,1, 0,0, 0,0, 0,0) 76e5f495d1SPrafulla Wadaskar #define MFP_PULL_FLOAT MFP(0x0000, 4,1, 0,0, 0,0, 0,0) 77e5f495d1SPrafulla Wadaskar #define MFP_PULL_MASK MFP(0x0000, 7,0, 0,0, 0,0, 0,0) 78e5f495d1SPrafulla Wadaskar 79e5f495d1SPrafulla Wadaskar #define MFP_EOC 0xffffffff /* indicates end-of-conf */ 80e5f495d1SPrafulla Wadaskar 81e5f495d1SPrafulla Wadaskar /* Functions */ 82e5f495d1SPrafulla Wadaskar void mfp_config(u32 *mfp_cfgs); 83e5f495d1SPrafulla Wadaskar 84e5f495d1SPrafulla Wadaskar #endif /* __MVMFP_H */ 85