1 /* 2 * Copyright 2008,2010 Freescale Semiconductor, Inc 3 * Andy Fleming 4 * 5 * Based (loosely) on the Linux code 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26 #ifndef _MMC_H_ 27 #define _MMC_H_ 28 29 #include <linux/list.h> 30 31 #define SD_VERSION_SD 0x20000 32 #define SD_VERSION_2 (SD_VERSION_SD | 0x20) 33 #define SD_VERSION_1_0 (SD_VERSION_SD | 0x10) 34 #define SD_VERSION_1_10 (SD_VERSION_SD | 0x1a) 35 #define MMC_VERSION_MMC 0x10000 36 #define MMC_VERSION_UNKNOWN (MMC_VERSION_MMC) 37 #define MMC_VERSION_1_2 (MMC_VERSION_MMC | 0x12) 38 #define MMC_VERSION_1_4 (MMC_VERSION_MMC | 0x14) 39 #define MMC_VERSION_2_2 (MMC_VERSION_MMC | 0x22) 40 #define MMC_VERSION_3 (MMC_VERSION_MMC | 0x30) 41 #define MMC_VERSION_4 (MMC_VERSION_MMC | 0x40) 42 43 #define MMC_MODE_HS 0x001 44 #define MMC_MODE_HS_52MHz 0x010 45 #define MMC_MODE_4BIT 0x100 46 #define MMC_MODE_8BIT 0x200 47 #define MMC_MODE_SPI 0x400 48 #define MMC_MODE_HC 0x800 49 50 #define MMC_MODE_MASK_WIDTH_BITS (MMC_MODE_4BIT | MMC_MODE_8BIT) 51 #define MMC_MODE_WIDTH_BITS_SHIFT 8 52 53 #define SD_DATA_4BIT 0x00040000 54 55 #define IS_SD(x) (x->version & SD_VERSION_SD) 56 57 #define MMC_DATA_READ 1 58 #define MMC_DATA_WRITE 2 59 60 #define NO_CARD_ERR -16 /* No SD/MMC card inserted */ 61 #define UNUSABLE_ERR -17 /* Unusable Card */ 62 #define COMM_ERR -18 /* Communications Error */ 63 #define TIMEOUT -19 64 65 #define MMC_CMD_GO_IDLE_STATE 0 66 #define MMC_CMD_SEND_OP_COND 1 67 #define MMC_CMD_ALL_SEND_CID 2 68 #define MMC_CMD_SET_RELATIVE_ADDR 3 69 #define MMC_CMD_SET_DSR 4 70 #define MMC_CMD_SWITCH 6 71 #define MMC_CMD_SELECT_CARD 7 72 #define MMC_CMD_SEND_EXT_CSD 8 73 #define MMC_CMD_SEND_CSD 9 74 #define MMC_CMD_SEND_CID 10 75 #define MMC_CMD_STOP_TRANSMISSION 12 76 #define MMC_CMD_SEND_STATUS 13 77 #define MMC_CMD_SET_BLOCKLEN 16 78 #define MMC_CMD_READ_SINGLE_BLOCK 17 79 #define MMC_CMD_READ_MULTIPLE_BLOCK 18 80 #define MMC_CMD_WRITE_SINGLE_BLOCK 24 81 #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25 82 #define MMC_CMD_ERASE_GROUP_START 35 83 #define MMC_CMD_ERASE_GROUP_END 36 84 #define MMC_CMD_ERASE 38 85 #define MMC_CMD_APP_CMD 55 86 #define MMC_CMD_SPI_READ_OCR 58 87 #define MMC_CMD_SPI_CRC_ON_OFF 59 88 89 #define SD_CMD_SEND_RELATIVE_ADDR 3 90 #define SD_CMD_SWITCH_FUNC 6 91 #define SD_CMD_SEND_IF_COND 8 92 93 #define SD_CMD_APP_SET_BUS_WIDTH 6 94 #define SD_CMD_ERASE_WR_BLK_START 32 95 #define SD_CMD_ERASE_WR_BLK_END 33 96 #define SD_CMD_APP_SEND_OP_COND 41 97 #define SD_CMD_APP_SEND_SCR 51 98 99 /* SCR definitions in different words */ 100 #define SD_HIGHSPEED_BUSY 0x00020000 101 #define SD_HIGHSPEED_SUPPORTED 0x00020000 102 103 #define MMC_HS_TIMING 0x00000100 104 #define MMC_HS_52MHZ 0x2 105 106 #define OCR_BUSY 0x80000000 107 #define OCR_HCS 0x40000000 108 #define OCR_VOLTAGE_MASK 0x007FFF80 109 #define OCR_ACCESS_MODE 0x60000000 110 111 #define SECURE_ERASE 0x80000000 112 113 #define MMC_STATUS_MASK (~0x0206BF7F) 114 #define MMC_STATUS_RDY_FOR_DATA (1 << 8) 115 #define MMC_STATUS_CURR_STATE (0xf << 9) 116 #define MMC_STATUS_ERROR (1 << 19) 117 118 #define MMC_STATE_PRG (7 << 9) 119 120 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ 121 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ 122 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ 123 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ 124 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ 125 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ 126 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ 127 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ 128 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ 129 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ 130 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ 131 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ 132 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ 133 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ 134 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ 135 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ 136 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ 137 138 #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ 139 #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte 140 addressed by index which are 141 1 in value field */ 142 #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte 143 addressed by index, which are 144 1 in value field */ 145 #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */ 146 147 #define SD_SWITCH_CHECK 0 148 #define SD_SWITCH_SWITCH 1 149 150 /* 151 * EXT_CSD fields 152 */ 153 #define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */ 154 #define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ 155 #define EXT_CSD_PART_CONF 179 /* R/W */ 156 #define EXT_CSD_BUS_WIDTH 183 /* R/W */ 157 #define EXT_CSD_HS_TIMING 185 /* R/W */ 158 #define EXT_CSD_REV 192 /* RO */ 159 #define EXT_CSD_CARD_TYPE 196 /* RO */ 160 #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ 161 #define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */ 162 163 /* 164 * EXT_CSD field definitions 165 */ 166 167 #define EXT_CSD_CMD_SET_NORMAL (1 << 0) 168 #define EXT_CSD_CMD_SET_SECURE (1 << 1) 169 #define EXT_CSD_CMD_SET_CPSECURE (1 << 2) 170 171 #define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */ 172 #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */ 173 174 #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ 175 #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ 176 #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ 177 178 #define R1_ILLEGAL_COMMAND (1 << 22) 179 #define R1_APP_CMD (1 << 5) 180 181 #define MMC_RSP_PRESENT (1 << 0) 182 #define MMC_RSP_136 (1 << 1) /* 136 bit response */ 183 #define MMC_RSP_CRC (1 << 2) /* expect valid crc */ 184 #define MMC_RSP_BUSY (1 << 3) /* card may send busy */ 185 #define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ 186 187 #define MMC_RSP_NONE (0) 188 #define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 189 #define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \ 190 MMC_RSP_BUSY) 191 #define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) 192 #define MMC_RSP_R3 (MMC_RSP_PRESENT) 193 #define MMC_RSP_R4 (MMC_RSP_PRESENT) 194 #define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 195 #define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 196 #define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 197 198 #define MMCPART_NOAVAILABLE (0xff) 199 #define PART_ACCESS_MASK (0x7) 200 #define PART_SUPPORT (0x1) 201 202 struct mmc_cid { 203 unsigned long psn; 204 unsigned short oid; 205 unsigned char mid; 206 unsigned char prv; 207 unsigned char mdt; 208 char pnm[7]; 209 }; 210 211 /* 212 * WARNING! 213 * 214 * This structure is used by atmel_mci.c only. 215 * It works for the AVR32 architecture but NOT 216 * for ARM/AT91 architectures. 217 * Its use is highly depreciated. 218 * After the atmel_mci.c driver for AVR32 has 219 * been replaced this structure will be removed. 220 */ 221 struct mmc_csd 222 { 223 u8 csd_structure:2, 224 spec_vers:4, 225 rsvd1:2; 226 u8 taac; 227 u8 nsac; 228 u8 tran_speed; 229 u16 ccc:12, 230 read_bl_len:4; 231 u64 read_bl_partial:1, 232 write_blk_misalign:1, 233 read_blk_misalign:1, 234 dsr_imp:1, 235 rsvd2:2, 236 c_size:12, 237 vdd_r_curr_min:3, 238 vdd_r_curr_max:3, 239 vdd_w_curr_min:3, 240 vdd_w_curr_max:3, 241 c_size_mult:3, 242 sector_size:5, 243 erase_grp_size:5, 244 wp_grp_size:5, 245 wp_grp_enable:1, 246 default_ecc:2, 247 r2w_factor:3, 248 write_bl_len:4, 249 write_bl_partial:1, 250 rsvd3:5; 251 u8 file_format_grp:1, 252 copy:1, 253 perm_write_protect:1, 254 tmp_write_protect:1, 255 file_format:2, 256 ecc:2; 257 u8 crc:7; 258 u8 one:1; 259 }; 260 261 struct mmc_cmd { 262 ushort cmdidx; 263 uint resp_type; 264 uint cmdarg; 265 uint response[4]; 266 uint flags; 267 }; 268 269 struct mmc_data { 270 union { 271 char *dest; 272 const char *src; /* src buffers don't get written to */ 273 }; 274 uint flags; 275 uint blocks; 276 uint blocksize; 277 }; 278 279 struct mmc { 280 struct list_head link; 281 char name[32]; 282 void *priv; 283 uint voltages; 284 uint version; 285 uint has_init; 286 uint f_min; 287 uint f_max; 288 int high_capacity; 289 uint bus_width; 290 uint clock; 291 uint card_caps; 292 uint host_caps; 293 uint ocr; 294 uint scr[2]; 295 uint csd[4]; 296 uint cid[4]; 297 ushort rca; 298 char part_config; 299 char part_num; 300 uint tran_speed; 301 uint read_bl_len; 302 uint write_bl_len; 303 uint erase_grp_size; 304 u64 capacity; 305 block_dev_desc_t block_dev; 306 int (*send_cmd)(struct mmc *mmc, 307 struct mmc_cmd *cmd, struct mmc_data *data); 308 void (*set_ios)(struct mmc *mmc); 309 int (*init)(struct mmc *mmc); 310 int (*getcd)(struct mmc *mmc); 311 uint b_max; 312 }; 313 314 int mmc_register(struct mmc *mmc); 315 int mmc_initialize(bd_t *bis); 316 int mmc_init(struct mmc *mmc); 317 int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size); 318 void mmc_set_clock(struct mmc *mmc, uint clock); 319 struct mmc *find_mmc_device(int dev_num); 320 int mmc_set_dev(int dev_num); 321 void print_mmc_devices(char separator); 322 int get_mmc_num(void); 323 int board_mmc_getcd(struct mmc *mmc); 324 int mmc_switch_part(int dev_num, unsigned int part_num); 325 int mmc_getcd(struct mmc *mmc); 326 327 #ifdef CONFIG_GENERIC_MMC 328 #define mmc_host_is_spi(mmc) ((mmc)->host_caps & MMC_MODE_SPI) 329 struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode); 330 #else 331 int mmc_legacy_init(int verbose); 332 #endif 333 334 #endif /* _MMC_H_ */ 335