xref: /rk3399_rockchip-uboot/include/micrel.h (revision 71817a16f1f0848b268ea627197e2b65cdc550ed)
18682aba7STroy Kisky #ifndef _MICREL_H
28682aba7STroy Kisky 
38682aba7STroy Kisky #define MII_KSZ9021_EXT_COMMON_CTRL		0x100
48682aba7STroy Kisky #define MII_KSZ9021_EXT_STRAP_STATUS		0x101
58682aba7STroy Kisky #define MII_KSZ9021_EXT_OP_STRAP_OVERRIDE	0x102
68682aba7STroy Kisky #define MII_KSZ9021_EXT_OP_STRAP_STATUS		0x103
78682aba7STroy Kisky #define MII_KSZ9021_EXT_RGMII_CLOCK_SKEW	0x104
88682aba7STroy Kisky #define MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW	0x105
98682aba7STroy Kisky #define MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW	0x106
108682aba7STroy Kisky #define MII_KSZ9021_EXT_ANALOG_TEST		0x107
1142a7cb50SSARTRE Leo /* Register operations */
1242a7cb50SSARTRE Leo #define MII_KSZ9031_MOD_REG			0x0000
1342a7cb50SSARTRE Leo /* Data operations */
1442a7cb50SSARTRE Leo #define MII_KSZ9031_MOD_DATA_NO_POST_INC	0x4000
1542a7cb50SSARTRE Leo #define MII_KSZ9031_MOD_DATA_POST_INC_RW	0x8000
1642a7cb50SSARTRE Leo #define MII_KSZ9031_MOD_DATA_POST_INC_W		0xC000
178682aba7STroy Kisky 
18*71817a16SStefano Babic #define MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW	0x4
19*71817a16SStefano Babic #define MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW	0x5
20*71817a16SStefano Babic #define MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW	0x6
21*71817a16SStefano Babic #define MII_KSZ9031_EXT_RGMII_CLOCK_SKEW	0x8
22*71817a16SStefano Babic 
238682aba7STroy Kisky struct phy_device;
248682aba7STroy Kisky int ksz9021_phy_extended_write(struct phy_device *phydev, int regnum, u16 val);
258682aba7STroy Kisky int ksz9021_phy_extended_read(struct phy_device *phydev, int regnum);
268682aba7STroy Kisky 
2742a7cb50SSARTRE Leo int ksz9031_phy_extended_write(struct phy_device *phydev, int devaddr,
2842a7cb50SSARTRE Leo 			       int regnum, u16 mode, u16 val);
2942a7cb50SSARTRE Leo int ksz9031_phy_extended_read(struct phy_device *phydev, int devaddr,
3042a7cb50SSARTRE Leo 			      int regnum, u16 mode);
3142a7cb50SSARTRE Leo 
328682aba7STroy Kisky #endif
33