1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2019 Rockchip Electronics Co., Ltd 4 */ 5 6 #ifndef _MEMBLK_H 7 #define _MEMBLK_H 8 9 #define ALIAS_COUNT_MAX 2 10 #define MEM_RESV_COUNT 3 11 12 enum memblk_id { 13 MEMBLK_ID_UNK, 14 15 /* Preloader */ 16 MEMBLK_ID_ATF, 17 MEMBLK_ID_OPTEE, 18 MEMBLK_ID_SHM, 19 20 /* U-Boot self */ 21 MEMBLK_ID_UBOOT, 22 MEMBLK_ID_STACK, 23 MEMBLK_ID_FASTBOOT, 24 25 /* Image */ 26 MEMBLK_ID_RAMDISK, 27 MEMBLK_ID_FDT, 28 MEMBLK_ID_FDT_DTBO, 29 MEMBLK_ID_FDT_AOSP, 30 MEMBLK_ID_KERNEL, 31 MEMBLK_ID_UNCOMP_KERNEL, 32 MEMBLK_ID_ANDROID, 33 MEMBLK_ID_AVB_ANDROID, 34 35 /* Other */ 36 MEMBLK_ID_BY_NAME, 37 MEMBLK_ID_KMEM_RESERVED, 38 MEMBLK_ID_DEMO, 39 MEMBLK_ID_MAX, 40 }; 41 42 struct memblk_attr { 43 const char *name; 44 const char *alias[ALIAS_COUNT_MAX]; 45 u32 flags; 46 }; 47 48 struct memblock { 49 phys_addr_t base; 50 phys_size_t size; 51 u64 base_u64; /* 4GB+ */ 52 u64 size_u64; 53 phys_addr_t orig_base; 54 struct memblk_attr attr; 55 struct list_head node; 56 }; 57 58 extern const struct memblk_attr *mem_attr; 59 60 #define SIZE_MB(len) ((len) >> 20) 61 #define SIZE_KB(len) (((len) % (1 << 20)) >> 10) 62 63 #define M_ATTR_NONE 0 64 /* Over-Flow-Check for region tail */ 65 #define M_ATTR_OFC (1 << 0) 66 /* Over-Flow-Check for region Head, only for U-Boot stack */ 67 #define M_ATTR_HOFC (1 << 1) 68 /* Memory can be overlap by fdt reserved memory, deprecated */ 69 #define M_ATTR_OVERLAP (1 << 2) 70 /* Just peek, always return success, deprecated */ 71 #define M_ATTR_PEEK (1 << 3) 72 /* The region start address should be aligned to cacheline size */ 73 #define M_ATTR_CACHELINE_ALIGN (1 << 4) 74 /* Kernel 'reserved-memory' */ 75 #define M_ATTR_KMEM_RESERVED (1 << 5) 76 /* The region can be overlap by kernel 'reserved-memory' */ 77 #define M_ATTR_KMEM_CAN_OVERLAP (1 << 6) 78 /* Ignore invisable region reserved by bidram */ 79 #define M_ATTR_IGNORE_INVISIBLE (1 << 7) 80 81 82 #endif /* _MEMBLK_H */ 83