188bfa979SJoseph Chen /* SPDX-License-Identifier: GPL-2.0+ */ 288bfa979SJoseph Chen /* 388bfa979SJoseph Chen * (C) Copyright 2019 Rockchip Electronics Co., Ltd 488bfa979SJoseph Chen */ 588bfa979SJoseph Chen 688bfa979SJoseph Chen #ifndef _MEMBLK_H 788bfa979SJoseph Chen #define _MEMBLK_H 888bfa979SJoseph Chen 950226c8fSJoseph Chen #define ALIAS_COUNT_MAX 2 101d09cf29SJoseph Chen #define MEM_RESV_COUNT 3 1150226c8fSJoseph Chen 1288bfa979SJoseph Chen enum memblk_id { 13*c01d4489SJoseph Chen MEM_UNK, 1488bfa979SJoseph Chen 1588bfa979SJoseph Chen /* Preloader */ 16*c01d4489SJoseph Chen MEM_ATF, 17*c01d4489SJoseph Chen MEM_OPTEE, 18*c01d4489SJoseph Chen MEM_SHM, 1988bfa979SJoseph Chen 2088bfa979SJoseph Chen /* U-Boot self */ 21*c01d4489SJoseph Chen MEM_UBOOT, 22*c01d4489SJoseph Chen MEM_STACK, 23*c01d4489SJoseph Chen MEM_FASTBOOT, 2488bfa979SJoseph Chen 2588bfa979SJoseph Chen /* Image */ 26*c01d4489SJoseph Chen MEM_RESOURCE, 27*c01d4489SJoseph Chen MEM_RAMDISK, 28*c01d4489SJoseph Chen MEM_FDT, 29*c01d4489SJoseph Chen MEM_FDT_DTBO, 30*c01d4489SJoseph Chen MEM_KERNEL, 31*c01d4489SJoseph Chen MEM_UNCOMP_KERNEL, 32*c01d4489SJoseph Chen MEM_ANDROID, 33*c01d4489SJoseph Chen MEM_AVB_ANDROID, 34*c01d4489SJoseph Chen MEM_FIT_USER, 35*c01d4489SJoseph Chen MEM_FIT, 36*c01d4489SJoseph Chen MEM_UIMAGE_USER, 37*c01d4489SJoseph Chen MEM_UIMAGE, 3888bfa979SJoseph Chen 3988bfa979SJoseph Chen /* Other */ 40*c01d4489SJoseph Chen MEM_SEARCH, 41*c01d4489SJoseph Chen MEM_BY_NAME, 42*c01d4489SJoseph Chen MEM_KMEM_RESERVED, 43*c01d4489SJoseph Chen MEM_MAX, 4488bfa979SJoseph Chen }; 4588bfa979SJoseph Chen 4688bfa979SJoseph Chen struct memblk_attr { 4788bfa979SJoseph Chen const char *name; 4850226c8fSJoseph Chen const char *alias[ALIAS_COUNT_MAX]; 4988bfa979SJoseph Chen u32 flags; 5088bfa979SJoseph Chen }; 5188bfa979SJoseph Chen 5288bfa979SJoseph Chen struct memblock { 5388bfa979SJoseph Chen phys_addr_t base; 5488bfa979SJoseph Chen phys_size_t size; 551d09cf29SJoseph Chen u64 base_u64; /* 4GB+ */ 561d09cf29SJoseph Chen u64 size_u64; 5750226c8fSJoseph Chen phys_addr_t orig_base; 5888bfa979SJoseph Chen struct memblk_attr attr; 5988bfa979SJoseph Chen struct list_head node; 6088bfa979SJoseph Chen }; 6188bfa979SJoseph Chen 6288bfa979SJoseph Chen extern const struct memblk_attr *mem_attr; 6388bfa979SJoseph Chen 6488bfa979SJoseph Chen #define SIZE_MB(len) ((len) >> 20) 6588bfa979SJoseph Chen #define SIZE_KB(len) (((len) % (1 << 20)) >> 10) 6688bfa979SJoseph Chen 67*c01d4489SJoseph Chen #define F_NONE 0 6850226c8fSJoseph Chen 69*c01d4489SJoseph Chen /* Over-Flow-Check for region tail */ 70*c01d4489SJoseph Chen #define F_OFC (1 << 0) 71*c01d4489SJoseph Chen 72*c01d4489SJoseph Chen /* Over-Flow-Check for region Head, only for U-Boot stack */ 73*c01d4489SJoseph Chen #define F_HOFC (1 << 1) 74*c01d4489SJoseph Chen 75*c01d4489SJoseph Chen /* Memory can be overlap by fdt reserved memory, deprecated */ 76*c01d4489SJoseph Chen #define F_OVERLAP (1 << 2) 77*c01d4489SJoseph Chen 78*c01d4489SJoseph Chen /* The region start address should be aligned to cacheline size */ 79*c01d4489SJoseph Chen #define F_CACHELINE_ALIGN (1 << 3) 80*c01d4489SJoseph Chen 81*c01d4489SJoseph Chen /* Kernel 'reserved-memory' */ 82*c01d4489SJoseph Chen #define F_KMEM_RESERVED (1 << 4) 83*c01d4489SJoseph Chen 84*c01d4489SJoseph Chen /* The region can be overlap by kernel 'reserved-memory' */ 85*c01d4489SJoseph Chen #define F_KMEM_CAN_OVERLAP (1 << 5) 86*c01d4489SJoseph Chen 87*c01d4489SJoseph Chen /* Ignore invisible region reserved by bidram */ 88*c01d4489SJoseph Chen #define F_IGNORE_INVISIBLE (1 << 6) 89*c01d4489SJoseph Chen 90*c01d4489SJoseph Chen /* Highest memory right under the sp */ 91*c01d4489SJoseph Chen #define F_HIGHEST_MEM (1 << 7) 92*c01d4489SJoseph Chen 93*c01d4489SJoseph Chen /* No sysmem layout dump if failed */ 94*c01d4489SJoseph Chen #define F_NO_FAIL_DUMP (1 << 8) 9588bfa979SJoseph Chen 9688bfa979SJoseph Chen #endif /* _MEMBLK_H */ 97