188bfa979SJoseph Chen /* SPDX-License-Identifier: GPL-2.0+ */ 288bfa979SJoseph Chen /* 388bfa979SJoseph Chen * (C) Copyright 2019 Rockchip Electronics Co., Ltd 488bfa979SJoseph Chen */ 588bfa979SJoseph Chen 688bfa979SJoseph Chen #ifndef _MEMBLK_H 788bfa979SJoseph Chen #define _MEMBLK_H 888bfa979SJoseph Chen 988bfa979SJoseph Chen enum memblk_id { 1088bfa979SJoseph Chen MEMBLK_ID_UNK, 1188bfa979SJoseph Chen 1288bfa979SJoseph Chen /* Preloader */ 1388bfa979SJoseph Chen MEMBLK_ID_ATF, 1488bfa979SJoseph Chen MEMBLK_ID_OPTEE, 1588bfa979SJoseph Chen MEMBLK_ID_SHM, 1688bfa979SJoseph Chen 1788bfa979SJoseph Chen /* U-Boot self */ 1888bfa979SJoseph Chen MEMBLK_ID_UBOOT, 1988bfa979SJoseph Chen MEMBLK_ID_STACK, 2088bfa979SJoseph Chen MEMBLK_ID_FASTBOOT, 2188bfa979SJoseph Chen 2288bfa979SJoseph Chen /* Image */ 2388bfa979SJoseph Chen MEMBLK_ID_RAMDISK, 2488bfa979SJoseph Chen MEMBLK_ID_FDT, 2588bfa979SJoseph Chen MEMBLK_ID_FDT_DTBO, 2688bfa979SJoseph Chen MEMBLK_ID_FDT_AOSP, 2788bfa979SJoseph Chen MEMBLK_ID_KERNEL, 280986a7ddSJoseph Chen MEMBLK_ID_UNCOMP_KERNEL, 2988bfa979SJoseph Chen MEMBLK_ID_ANDROID, 30f6e15301SJoseph Chen MEMBLK_ID_AVB_ANDROID, 3188bfa979SJoseph Chen 3288bfa979SJoseph Chen /* Other */ 3388bfa979SJoseph Chen MEMBLK_ID_BY_NAME, 3488bfa979SJoseph Chen MEMBLK_ID_FDT_RESV, 3588bfa979SJoseph Chen MEMBLK_ID_DEMO, 3688bfa979SJoseph Chen MEMBLK_ID_MAX, 3788bfa979SJoseph Chen }; 3888bfa979SJoseph Chen 3988bfa979SJoseph Chen struct memblk_attr { 4088bfa979SJoseph Chen const char *name; 4188bfa979SJoseph Chen const char *alias[2]; 4288bfa979SJoseph Chen u32 flags; 4388bfa979SJoseph Chen }; 4488bfa979SJoseph Chen 4588bfa979SJoseph Chen struct memblock { 4688bfa979SJoseph Chen phys_addr_t base; 4788bfa979SJoseph Chen phys_size_t size; 4888bfa979SJoseph Chen struct memblk_attr attr; 4988bfa979SJoseph Chen struct list_head node; 5088bfa979SJoseph Chen }; 5188bfa979SJoseph Chen 5288bfa979SJoseph Chen extern const struct memblk_attr *mem_attr; 5388bfa979SJoseph Chen 5488bfa979SJoseph Chen #define SIZE_MB(len) ((len) >> 20) 5588bfa979SJoseph Chen #define SIZE_KB(len) (((len) % (1 << 20)) >> 10) 5688bfa979SJoseph Chen 5788bfa979SJoseph Chen #define M_ATTR_NONE 0 5888bfa979SJoseph Chen /* Over-Flow-Check for region tail */ 5988bfa979SJoseph Chen #define M_ATTR_OFC (1 << 0) 6088bfa979SJoseph Chen /* Over-Flow-Check for region Head, only for U-Boot stack */ 6188bfa979SJoseph Chen #define M_ATTR_HOFC (1 << 1) 6288bfa979SJoseph Chen /* Memory can be overlap by fdt reserved memory */ 6388bfa979SJoseph Chen #define M_ATTR_OVERLAP (1 << 2) 64efda1f1dSJoseph Chen /* Just peek, always return success */ 65efda1f1dSJoseph Chen #define M_ATTR_PEEK (1 << 3) 66*556bbbe4SJoseph Chen /* The region start address should be aligned to cacheline size */ 67*556bbbe4SJoseph Chen #define M_ATTR_CACHELINE_ALIGN (1 << 4) 6888bfa979SJoseph Chen 6988bfa979SJoseph Chen #endif /* _MEMBLK_H */ 70