188bfa979SJoseph Chen /* SPDX-License-Identifier: GPL-2.0+ */ 288bfa979SJoseph Chen /* 388bfa979SJoseph Chen * (C) Copyright 2019 Rockchip Electronics Co., Ltd 488bfa979SJoseph Chen */ 588bfa979SJoseph Chen 688bfa979SJoseph Chen #ifndef _MEMBLK_H 788bfa979SJoseph Chen #define _MEMBLK_H 888bfa979SJoseph Chen 9*50226c8fSJoseph Chen #define ALIAS_COUNT_MAX 2 10*50226c8fSJoseph Chen 1188bfa979SJoseph Chen enum memblk_id { 1288bfa979SJoseph Chen MEMBLK_ID_UNK, 1388bfa979SJoseph Chen 1488bfa979SJoseph Chen /* Preloader */ 1588bfa979SJoseph Chen MEMBLK_ID_ATF, 1688bfa979SJoseph Chen MEMBLK_ID_OPTEE, 1788bfa979SJoseph Chen MEMBLK_ID_SHM, 1888bfa979SJoseph Chen 1988bfa979SJoseph Chen /* U-Boot self */ 2088bfa979SJoseph Chen MEMBLK_ID_UBOOT, 2188bfa979SJoseph Chen MEMBLK_ID_STACK, 2288bfa979SJoseph Chen MEMBLK_ID_FASTBOOT, 2388bfa979SJoseph Chen 2488bfa979SJoseph Chen /* Image */ 2588bfa979SJoseph Chen MEMBLK_ID_RAMDISK, 2688bfa979SJoseph Chen MEMBLK_ID_FDT, 2788bfa979SJoseph Chen MEMBLK_ID_FDT_DTBO, 2888bfa979SJoseph Chen MEMBLK_ID_FDT_AOSP, 2988bfa979SJoseph Chen MEMBLK_ID_KERNEL, 300986a7ddSJoseph Chen MEMBLK_ID_UNCOMP_KERNEL, 3188bfa979SJoseph Chen MEMBLK_ID_ANDROID, 32f6e15301SJoseph Chen MEMBLK_ID_AVB_ANDROID, 3388bfa979SJoseph Chen 3488bfa979SJoseph Chen /* Other */ 3588bfa979SJoseph Chen MEMBLK_ID_BY_NAME, 36*50226c8fSJoseph Chen MEMBLK_ID_KMEM_RESERVED, 3788bfa979SJoseph Chen MEMBLK_ID_DEMO, 3888bfa979SJoseph Chen MEMBLK_ID_MAX, 3988bfa979SJoseph Chen }; 4088bfa979SJoseph Chen 4188bfa979SJoseph Chen struct memblk_attr { 4288bfa979SJoseph Chen const char *name; 43*50226c8fSJoseph Chen const char *alias[ALIAS_COUNT_MAX]; 4488bfa979SJoseph Chen u32 flags; 4588bfa979SJoseph Chen }; 4688bfa979SJoseph Chen 4788bfa979SJoseph Chen struct memblock { 4888bfa979SJoseph Chen phys_addr_t base; 4988bfa979SJoseph Chen phys_size_t size; 50*50226c8fSJoseph Chen phys_addr_t orig_base; 5188bfa979SJoseph Chen struct memblk_attr attr; 5288bfa979SJoseph Chen struct list_head node; 5388bfa979SJoseph Chen }; 5488bfa979SJoseph Chen 5588bfa979SJoseph Chen extern const struct memblk_attr *mem_attr; 5688bfa979SJoseph Chen 5788bfa979SJoseph Chen #define SIZE_MB(len) ((len) >> 20) 5888bfa979SJoseph Chen #define SIZE_KB(len) (((len) % (1 << 20)) >> 10) 5988bfa979SJoseph Chen 6088bfa979SJoseph Chen #define M_ATTR_NONE 0 6188bfa979SJoseph Chen /* Over-Flow-Check for region tail */ 6288bfa979SJoseph Chen #define M_ATTR_OFC (1 << 0) 6388bfa979SJoseph Chen /* Over-Flow-Check for region Head, only for U-Boot stack */ 6488bfa979SJoseph Chen #define M_ATTR_HOFC (1 << 1) 65*50226c8fSJoseph Chen /* Memory can be overlap by fdt reserved memory, deprecated */ 6688bfa979SJoseph Chen #define M_ATTR_OVERLAP (1 << 2) 67*50226c8fSJoseph Chen /* Just peek, always return success, deprecated */ 68efda1f1dSJoseph Chen #define M_ATTR_PEEK (1 << 3) 69556bbbe4SJoseph Chen /* The region start address should be aligned to cacheline size */ 70556bbbe4SJoseph Chen #define M_ATTR_CACHELINE_ALIGN (1 << 4) 71*50226c8fSJoseph Chen /* Kernel 'reserved-memory' */ 72*50226c8fSJoseph Chen #define M_ATTR_KMEM_RESERVED (1 << 5) 73*50226c8fSJoseph Chen /* The region can be overlap by kernel 'reserved-memory' */ 74*50226c8fSJoseph Chen #define M_ATTR_KMEM_CAN_OVERLAP (1 << 6) 75*50226c8fSJoseph Chen /* Ignore invisable region reserved by bidram */ 76*50226c8fSJoseph Chen #define M_ATTR_IGNORE_INVISIBLE (1 << 7) 77*50226c8fSJoseph Chen 7888bfa979SJoseph Chen 7988bfa979SJoseph Chen #endif /* _MEMBLK_H */ 80