188bfa979SJoseph Chen /* SPDX-License-Identifier: GPL-2.0+ */ 288bfa979SJoseph Chen /* 388bfa979SJoseph Chen * (C) Copyright 2019 Rockchip Electronics Co., Ltd 488bfa979SJoseph Chen */ 588bfa979SJoseph Chen 688bfa979SJoseph Chen #ifndef _MEMBLK_H 788bfa979SJoseph Chen #define _MEMBLK_H 888bfa979SJoseph Chen 950226c8fSJoseph Chen #define ALIAS_COUNT_MAX 2 10*1d09cf29SJoseph Chen #define MEM_RESV_COUNT 3 1150226c8fSJoseph Chen 1288bfa979SJoseph Chen enum memblk_id { 1388bfa979SJoseph Chen MEMBLK_ID_UNK, 1488bfa979SJoseph Chen 1588bfa979SJoseph Chen /* Preloader */ 1688bfa979SJoseph Chen MEMBLK_ID_ATF, 1788bfa979SJoseph Chen MEMBLK_ID_OPTEE, 1888bfa979SJoseph Chen MEMBLK_ID_SHM, 1988bfa979SJoseph Chen 2088bfa979SJoseph Chen /* U-Boot self */ 2188bfa979SJoseph Chen MEMBLK_ID_UBOOT, 2288bfa979SJoseph Chen MEMBLK_ID_STACK, 2388bfa979SJoseph Chen MEMBLK_ID_FASTBOOT, 2488bfa979SJoseph Chen 2588bfa979SJoseph Chen /* Image */ 2688bfa979SJoseph Chen MEMBLK_ID_RAMDISK, 2788bfa979SJoseph Chen MEMBLK_ID_FDT, 2888bfa979SJoseph Chen MEMBLK_ID_FDT_DTBO, 2988bfa979SJoseph Chen MEMBLK_ID_FDT_AOSP, 3088bfa979SJoseph Chen MEMBLK_ID_KERNEL, 310986a7ddSJoseph Chen MEMBLK_ID_UNCOMP_KERNEL, 3288bfa979SJoseph Chen MEMBLK_ID_ANDROID, 33f6e15301SJoseph Chen MEMBLK_ID_AVB_ANDROID, 3488bfa979SJoseph Chen 3588bfa979SJoseph Chen /* Other */ 3688bfa979SJoseph Chen MEMBLK_ID_BY_NAME, 3750226c8fSJoseph Chen MEMBLK_ID_KMEM_RESERVED, 3888bfa979SJoseph Chen MEMBLK_ID_DEMO, 3988bfa979SJoseph Chen MEMBLK_ID_MAX, 4088bfa979SJoseph Chen }; 4188bfa979SJoseph Chen 4288bfa979SJoseph Chen struct memblk_attr { 4388bfa979SJoseph Chen const char *name; 4450226c8fSJoseph Chen const char *alias[ALIAS_COUNT_MAX]; 4588bfa979SJoseph Chen u32 flags; 4688bfa979SJoseph Chen }; 4788bfa979SJoseph Chen 4888bfa979SJoseph Chen struct memblock { 4988bfa979SJoseph Chen phys_addr_t base; 5088bfa979SJoseph Chen phys_size_t size; 51*1d09cf29SJoseph Chen u64 base_u64; /* 4GB+ */ 52*1d09cf29SJoseph Chen u64 size_u64; 5350226c8fSJoseph Chen phys_addr_t orig_base; 5488bfa979SJoseph Chen struct memblk_attr attr; 5588bfa979SJoseph Chen struct list_head node; 5688bfa979SJoseph Chen }; 5788bfa979SJoseph Chen 5888bfa979SJoseph Chen extern const struct memblk_attr *mem_attr; 5988bfa979SJoseph Chen 6088bfa979SJoseph Chen #define SIZE_MB(len) ((len) >> 20) 6188bfa979SJoseph Chen #define SIZE_KB(len) (((len) % (1 << 20)) >> 10) 6288bfa979SJoseph Chen 6388bfa979SJoseph Chen #define M_ATTR_NONE 0 6488bfa979SJoseph Chen /* Over-Flow-Check for region tail */ 6588bfa979SJoseph Chen #define M_ATTR_OFC (1 << 0) 6688bfa979SJoseph Chen /* Over-Flow-Check for region Head, only for U-Boot stack */ 6788bfa979SJoseph Chen #define M_ATTR_HOFC (1 << 1) 6850226c8fSJoseph Chen /* Memory can be overlap by fdt reserved memory, deprecated */ 6988bfa979SJoseph Chen #define M_ATTR_OVERLAP (1 << 2) 7050226c8fSJoseph Chen /* Just peek, always return success, deprecated */ 71efda1f1dSJoseph Chen #define M_ATTR_PEEK (1 << 3) 72556bbbe4SJoseph Chen /* The region start address should be aligned to cacheline size */ 73556bbbe4SJoseph Chen #define M_ATTR_CACHELINE_ALIGN (1 << 4) 7450226c8fSJoseph Chen /* Kernel 'reserved-memory' */ 7550226c8fSJoseph Chen #define M_ATTR_KMEM_RESERVED (1 << 5) 7650226c8fSJoseph Chen /* The region can be overlap by kernel 'reserved-memory' */ 7750226c8fSJoseph Chen #define M_ATTR_KMEM_CAN_OVERLAP (1 << 6) 7850226c8fSJoseph Chen /* Ignore invisable region reserved by bidram */ 7950226c8fSJoseph Chen #define M_ATTR_IGNORE_INVISIBLE (1 << 7) 8050226c8fSJoseph Chen 8188bfa979SJoseph Chen 8288bfa979SJoseph Chen #endif /* _MEMBLK_H */ 83