xref: /rk3399_rockchip-uboot/include/mc9sdz60.h (revision 326ea986ac150acdc7656d57fca647db80b50158)
101bb24b6SStefano Babic /*
201bb24b6SStefano Babic  * Copyright (C) 2009 Marc Kleine-Budde <mkl@pengutronix.de>
301bb24b6SStefano Babic  *
401bb24b6SStefano Babic  * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
501bb24b6SStefano Babic  *
6*1a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
701bb24b6SStefano Babic  */
801bb24b6SStefano Babic 
901bb24b6SStefano Babic #ifndef __ASM_ARCH_MC9SDZ60_H
1001bb24b6SStefano Babic #define __ASM_ARCH_MC9SDZ60_H
1101bb24b6SStefano Babic 
1201bb24b6SStefano Babic /**
1301bb24b6SStefano Babic  * Register addresses for the MC9SDZ60
1401bb24b6SStefano Babic  *
1501bb24b6SStefano Babic  * @note: these match those in the kernel drivers/mxc/mcu_pmic/mc9s08dz60.h
1601bb24b6SStefano Babic  * but not include/linux/mfd/mc9s08dz60/pmic.h
1701bb24b6SStefano Babic  *
1801bb24b6SStefano Babic  */
1901bb24b6SStefano Babic enum mc9sdz60_reg {
2001bb24b6SStefano Babic 	MC9SDZ60_REG_VERSION		= 0x00,
2101bb24b6SStefano Babic 	/* reserved                       0x01 */
2201bb24b6SStefano Babic 	MC9SDZ60_REG_SECS		= 0x02,
2301bb24b6SStefano Babic 	MC9SDZ60_REG_MINS		= 0x03,
2401bb24b6SStefano Babic 	MC9SDZ60_REG_HRS		= 0x04,
2501bb24b6SStefano Babic 	MC9SDZ60_REG_DAY		= 0x05,
2601bb24b6SStefano Babic 	MC9SDZ60_REG_DATE		= 0x06,
2701bb24b6SStefano Babic 	MC9SDZ60_REG_MONTH		= 0x07,
2801bb24b6SStefano Babic 	MC9SDZ60_REG_YEAR		= 0x08,
2901bb24b6SStefano Babic 	MC9SDZ60_REG_ALARM_SECS		= 0x09,
3001bb24b6SStefano Babic 	MC9SDZ60_REG_ALARM_MINS		= 0x0a,
3101bb24b6SStefano Babic 	MC9SDZ60_REG_ALARM_HRS		= 0x0b,
3201bb24b6SStefano Babic 	/* reserved                       0x0c */
3301bb24b6SStefano Babic 	/* reserved                       0x0d */
3401bb24b6SStefano Babic 	MC9SDZ60_REG_TS_CONTROL		= 0x0e,
3501bb24b6SStefano Babic 	MC9SDZ60_REG_X_LOW		= 0x0f,
3601bb24b6SStefano Babic 	MC9SDZ60_REG_Y_LOW		= 0x10,
3701bb24b6SStefano Babic 	MC9SDZ60_REG_XY_HIGH		= 0x11,
3801bb24b6SStefano Babic 	MC9SDZ60_REG_X_LEFT_LOW		= 0x12,
3901bb24b6SStefano Babic 	MC9SDZ60_REG_X_LEFT_HIGH	= 0x13,
4001bb24b6SStefano Babic 	MC9SDZ60_REG_X_RIGHT		= 0x14,
4101bb24b6SStefano Babic 	MC9SDZ60_REG_Y_TOP_LOW		= 0x15,
4201bb24b6SStefano Babic 	MC9SDZ60_REG_Y_TOP_HIGH		= 0x16,
4301bb24b6SStefano Babic 	MC9SDZ60_REG_Y_BOTTOM		= 0x17,
4401bb24b6SStefano Babic 	/* reserved                       0x18 */
4501bb24b6SStefano Babic 	/* reserved                       0x19 */
4601bb24b6SStefano Babic 	MC9SDZ60_REG_RESET_1		= 0x1a,
4701bb24b6SStefano Babic 	MC9SDZ60_REG_RESET_2		= 0x1b,
4801bb24b6SStefano Babic 	MC9SDZ60_REG_POWER_CTL		= 0x1c,
4901bb24b6SStefano Babic 	MC9SDZ60_REG_DELAY_CONFIG	= 0x1d,
5001bb24b6SStefano Babic 	/* reserved                       0x1e */
5101bb24b6SStefano Babic 	/* reserved                       0x1f */
5201bb24b6SStefano Babic 	MC9SDZ60_REG_GPIO_1		= 0x20,
5301bb24b6SStefano Babic 	MC9SDZ60_REG_GPIO_2		= 0x21,
5401bb24b6SStefano Babic 	MC9SDZ60_REG_KPD_1		= 0x22,
5501bb24b6SStefano Babic 	MC9SDZ60_REG_KPD_2		= 0x23,
5601bb24b6SStefano Babic 	MC9SDZ60_REG_KPD_CONTROL	= 0x24,
5701bb24b6SStefano Babic 	MC9SDZ60_REG_INT_ENABLE_1	= 0x25,
5801bb24b6SStefano Babic 	MC9SDZ60_REG_INT_ENABLE_2	= 0x26,
5901bb24b6SStefano Babic 	MC9SDZ60_REG_INT_FLAG_1		= 0x27,
6001bb24b6SStefano Babic 	MC9SDZ60_REG_INT_FLAG_2		= 0x28,
6101bb24b6SStefano Babic 	MC9SDZ60_REG_DES_FLAG		= 0x29,
6201bb24b6SStefano Babic };
6301bb24b6SStefano Babic 
6401bb24b6SStefano Babic extern u8 mc9sdz60_reg_read(enum mc9sdz60_reg reg);
6501bb24b6SStefano Babic extern void mc9sdz60_reg_write(enum mc9sdz60_reg reg, u8 val);
6601bb24b6SStefano Babic 
6701bb24b6SStefano Babic #endif /* __ASM_ARCH_MC9SDZ60_H */
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