1*4678d674SMinkyu Kang /* 2*4678d674SMinkyu Kang * Copyright (C) 2005-2009 Samsung Electronics 3*4678d674SMinkyu Kang * Minkyu Kang <mk7.kang@samsung.com> 4*4678d674SMinkyu Kang * Kyungmin Park <kyungmin.park@samsung.com> 5*4678d674SMinkyu Kang * 6*4678d674SMinkyu Kang * See file CREDITS for list of people who contributed to this 7*4678d674SMinkyu Kang * project. 8*4678d674SMinkyu Kang * 9*4678d674SMinkyu Kang * This program is free software; you can redistribute it and/or 10*4678d674SMinkyu Kang * modify it under the terms of the GNU General Public License as 11*4678d674SMinkyu Kang * published by the Free Software Foundation; either version 2 of 12*4678d674SMinkyu Kang * the License, or (at your option) any later version. 13*4678d674SMinkyu Kang * 14*4678d674SMinkyu Kang * This program is distributed in the hope that it will be useful, 15*4678d674SMinkyu Kang * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*4678d674SMinkyu Kang * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*4678d674SMinkyu Kang * GNU General Public License for more details. 18*4678d674SMinkyu Kang * 19*4678d674SMinkyu Kang * You should have received a copy of the GNU General Public License 20*4678d674SMinkyu Kang * along with this program; if not, write to the Free Software 21*4678d674SMinkyu Kang * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22*4678d674SMinkyu Kang * MA 02111-1307 USA 23*4678d674SMinkyu Kang */ 24*4678d674SMinkyu Kang 25*4678d674SMinkyu Kang #ifndef __SAMSUNG_ONENAND_H__ 26*4678d674SMinkyu Kang #define __SAMSUNG_ONENAND_H__ 27*4678d674SMinkyu Kang 28*4678d674SMinkyu Kang /* 29*4678d674SMinkyu Kang * OneNAND Controller 30*4678d674SMinkyu Kang */ 31*4678d674SMinkyu Kang 32*4678d674SMinkyu Kang #ifndef __ASSEMBLY__ 33*4678d674SMinkyu Kang struct samsung_onenand { 34*4678d674SMinkyu Kang unsigned long mem_cfg; /* 0x0000 */ 35*4678d674SMinkyu Kang unsigned char res1[0xc]; 36*4678d674SMinkyu Kang unsigned long burst_len; /* 0x0010 */ 37*4678d674SMinkyu Kang unsigned char res2[0xc]; 38*4678d674SMinkyu Kang unsigned long mem_reset; /* 0x0020 */ 39*4678d674SMinkyu Kang unsigned char res3[0xc]; 40*4678d674SMinkyu Kang unsigned long int_err_stat; /* 0x0030 */ 41*4678d674SMinkyu Kang unsigned char res4[0xc]; 42*4678d674SMinkyu Kang unsigned long int_err_mask; /* 0x0040 */ 43*4678d674SMinkyu Kang unsigned char res5[0xc]; 44*4678d674SMinkyu Kang unsigned long int_err_ack; /* 0x0050 */ 45*4678d674SMinkyu Kang unsigned char res6[0xc]; 46*4678d674SMinkyu Kang unsigned long ecc_err_stat; /* 0x0060 */ 47*4678d674SMinkyu Kang unsigned char res7[0xc]; 48*4678d674SMinkyu Kang unsigned long manufact_id; /* 0x0070 */ 49*4678d674SMinkyu Kang unsigned char res8[0xc]; 50*4678d674SMinkyu Kang unsigned long device_id; /* 0x0080 */ 51*4678d674SMinkyu Kang unsigned char res9[0xc]; 52*4678d674SMinkyu Kang unsigned long data_buf_size; /* 0x0090 */ 53*4678d674SMinkyu Kang unsigned char res10[0xc]; 54*4678d674SMinkyu Kang unsigned long boot_buf_size; /* 0x00A0 */ 55*4678d674SMinkyu Kang unsigned char res11[0xc]; 56*4678d674SMinkyu Kang unsigned long buf_amount; /* 0x00B0 */ 57*4678d674SMinkyu Kang unsigned char res12[0xc]; 58*4678d674SMinkyu Kang unsigned long tech; /* 0x00C0 */ 59*4678d674SMinkyu Kang unsigned char res13[0xc]; 60*4678d674SMinkyu Kang unsigned long fba; /* 0x00D0 */ 61*4678d674SMinkyu Kang unsigned char res14[0xc]; 62*4678d674SMinkyu Kang unsigned long fpa; /* 0x00E0 */ 63*4678d674SMinkyu Kang unsigned char res15[0xc]; 64*4678d674SMinkyu Kang unsigned long fsa; /* 0x00F0 */ 65*4678d674SMinkyu Kang unsigned char res16[0x3c]; 66*4678d674SMinkyu Kang unsigned long sync_mode; /* 0x0130 */ 67*4678d674SMinkyu Kang unsigned char res17[0xc]; 68*4678d674SMinkyu Kang unsigned long trans_spare; /* 0x0140 */ 69*4678d674SMinkyu Kang unsigned char res18[0x3c]; 70*4678d674SMinkyu Kang unsigned long err_page_addr; /* 0x0180 */ 71*4678d674SMinkyu Kang unsigned char res19[0x1c]; 72*4678d674SMinkyu Kang unsigned long int_pin_en; /* 0x01A0 */ 73*4678d674SMinkyu Kang unsigned char res20[0x1c]; 74*4678d674SMinkyu Kang unsigned long acc_clock; /* 0x01C0 */ 75*4678d674SMinkyu Kang unsigned char res21[0x1c]; 76*4678d674SMinkyu Kang unsigned long err_blk_addr; /* 0x01E0 */ 77*4678d674SMinkyu Kang unsigned char res22[0xc]; 78*4678d674SMinkyu Kang unsigned long flash_ver_id; /* 0x01F0 */ 79*4678d674SMinkyu Kang unsigned char res23[0x6c]; 80*4678d674SMinkyu Kang unsigned long watchdog_cnt_low; /* 0x0260 */ 81*4678d674SMinkyu Kang unsigned char res24[0xc]; 82*4678d674SMinkyu Kang unsigned long watchdog_cnt_hi; /* 0x0270 */ 83*4678d674SMinkyu Kang unsigned char res25[0xc]; 84*4678d674SMinkyu Kang unsigned long sync_write; /* 0x0280 */ 85*4678d674SMinkyu Kang unsigned char res26[0x1c]; 86*4678d674SMinkyu Kang unsigned long cold_reset; /* 0x02A0 */ 87*4678d674SMinkyu Kang unsigned char res27[0xc]; 88*4678d674SMinkyu Kang unsigned long ddp_device; /* 0x02B0 */ 89*4678d674SMinkyu Kang unsigned char res28[0xc]; 90*4678d674SMinkyu Kang unsigned long multi_plane; /* 0x02C0 */ 91*4678d674SMinkyu Kang unsigned char res29[0x1c]; 92*4678d674SMinkyu Kang unsigned long trans_mode; /* 0x02E0 */ 93*4678d674SMinkyu Kang unsigned char res30[0x1c]; 94*4678d674SMinkyu Kang unsigned long ecc_err_stat2; /* 0x0300 */ 95*4678d674SMinkyu Kang unsigned char res31[0xc]; 96*4678d674SMinkyu Kang unsigned long ecc_err_stat3; /* 0x0310 */ 97*4678d674SMinkyu Kang unsigned char res32[0xc]; 98*4678d674SMinkyu Kang unsigned long ecc_err_stat4; /* 0x0320 */ 99*4678d674SMinkyu Kang unsigned char res33[0x1c]; 100*4678d674SMinkyu Kang unsigned long dev_page_size; /* 0x0340 */ 101*4678d674SMinkyu Kang unsigned char res34[0x4c]; 102*4678d674SMinkyu Kang unsigned long int_mon_status; /* 0x0390 */ 103*4678d674SMinkyu Kang }; 104*4678d674SMinkyu Kang #endif 105*4678d674SMinkyu Kang 106*4678d674SMinkyu Kang #define ONENAND_MEM_RESET_HOT 0x3 107*4678d674SMinkyu Kang #define ONENAND_MEM_RESET_COLD 0x2 108*4678d674SMinkyu Kang #define ONENAND_MEM_RESET_WARM 0x1 109*4678d674SMinkyu Kang 110*4678d674SMinkyu Kang #define INT_ERR_ALL 0x3fff 111*4678d674SMinkyu Kang #define CACHE_OP_ERR (1 << 13) 112*4678d674SMinkyu Kang #define RST_CMP (1 << 12) 113*4678d674SMinkyu Kang #define RDY_ACT (1 << 11) 114*4678d674SMinkyu Kang #define INT_ACT (1 << 10) 115*4678d674SMinkyu Kang #define UNSUP_CMD (1 << 9) 116*4678d674SMinkyu Kang #define LOCKED_BLK (1 << 8) 117*4678d674SMinkyu Kang #define BLK_RW_CMP (1 << 7) 118*4678d674SMinkyu Kang #define ERS_CMP (1 << 6) 119*4678d674SMinkyu Kang #define PGM_CMP (1 << 5) 120*4678d674SMinkyu Kang #define LOAD_CMP (1 << 4) 121*4678d674SMinkyu Kang #define ERS_FAIL (1 << 3) 122*4678d674SMinkyu Kang #define PGM_FAIL (1 << 2) 123*4678d674SMinkyu Kang #define INT_TO (1 << 1) 124*4678d674SMinkyu Kang #define LD_FAIL_ECC_ERR (1 << 0) 125*4678d674SMinkyu Kang 126*4678d674SMinkyu Kang #define TSRF (1 << 0) 127*4678d674SMinkyu Kang 128*4678d674SMinkyu Kang /* common initialize function */ 129*4678d674SMinkyu Kang extern void s3c_onenand_init(struct mtd_info *); 130*4678d674SMinkyu Kang 131*4678d674SMinkyu Kang #endif 132