14678d674SMinkyu Kang /* 24678d674SMinkyu Kang * Copyright (C) 2005-2009 Samsung Electronics 34678d674SMinkyu Kang * Minkyu Kang <mk7.kang@samsung.com> 44678d674SMinkyu Kang * Kyungmin Park <kyungmin.park@samsung.com> 54678d674SMinkyu Kang * 6*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 74678d674SMinkyu Kang */ 84678d674SMinkyu Kang 94678d674SMinkyu Kang #ifndef __SAMSUNG_ONENAND_H__ 104678d674SMinkyu Kang #define __SAMSUNG_ONENAND_H__ 114678d674SMinkyu Kang 124678d674SMinkyu Kang /* 134678d674SMinkyu Kang * OneNAND Controller 144678d674SMinkyu Kang */ 154678d674SMinkyu Kang 164678d674SMinkyu Kang #ifndef __ASSEMBLY__ 174678d674SMinkyu Kang struct samsung_onenand { 18f3807374SMinkyu Kang unsigned int mem_cfg; /* 0x0000 */ 194678d674SMinkyu Kang unsigned char res1[0xc]; 20f3807374SMinkyu Kang unsigned int burst_len; /* 0x0010 */ 214678d674SMinkyu Kang unsigned char res2[0xc]; 22f3807374SMinkyu Kang unsigned int mem_reset; /* 0x0020 */ 234678d674SMinkyu Kang unsigned char res3[0xc]; 24f3807374SMinkyu Kang unsigned int int_err_stat; /* 0x0030 */ 254678d674SMinkyu Kang unsigned char res4[0xc]; 26f3807374SMinkyu Kang unsigned int int_err_mask; /* 0x0040 */ 274678d674SMinkyu Kang unsigned char res5[0xc]; 28f3807374SMinkyu Kang unsigned int int_err_ack; /* 0x0050 */ 294678d674SMinkyu Kang unsigned char res6[0xc]; 30f3807374SMinkyu Kang unsigned int ecc_err_stat; /* 0x0060 */ 314678d674SMinkyu Kang unsigned char res7[0xc]; 32f3807374SMinkyu Kang unsigned int manufact_id; /* 0x0070 */ 334678d674SMinkyu Kang unsigned char res8[0xc]; 34f3807374SMinkyu Kang unsigned int device_id; /* 0x0080 */ 354678d674SMinkyu Kang unsigned char res9[0xc]; 36f3807374SMinkyu Kang unsigned int data_buf_size; /* 0x0090 */ 374678d674SMinkyu Kang unsigned char res10[0xc]; 38f3807374SMinkyu Kang unsigned int boot_buf_size; /* 0x00A0 */ 394678d674SMinkyu Kang unsigned char res11[0xc]; 40f3807374SMinkyu Kang unsigned int buf_amount; /* 0x00B0 */ 414678d674SMinkyu Kang unsigned char res12[0xc]; 42f3807374SMinkyu Kang unsigned int tech; /* 0x00C0 */ 434678d674SMinkyu Kang unsigned char res13[0xc]; 44f3807374SMinkyu Kang unsigned int fba; /* 0x00D0 */ 454678d674SMinkyu Kang unsigned char res14[0xc]; 46f3807374SMinkyu Kang unsigned int fpa; /* 0x00E0 */ 474678d674SMinkyu Kang unsigned char res15[0xc]; 48f3807374SMinkyu Kang unsigned int fsa; /* 0x00F0 */ 494678d674SMinkyu Kang unsigned char res16[0x3c]; 50f3807374SMinkyu Kang unsigned int sync_mode; /* 0x0130 */ 514678d674SMinkyu Kang unsigned char res17[0xc]; 52f3807374SMinkyu Kang unsigned int trans_spare; /* 0x0140 */ 534678d674SMinkyu Kang unsigned char res18[0x3c]; 54f3807374SMinkyu Kang unsigned int err_page_addr; /* 0x0180 */ 554678d674SMinkyu Kang unsigned char res19[0x1c]; 56f3807374SMinkyu Kang unsigned int int_pin_en; /* 0x01A0 */ 574678d674SMinkyu Kang unsigned char res20[0x1c]; 58f3807374SMinkyu Kang unsigned int acc_clock; /* 0x01C0 */ 594678d674SMinkyu Kang unsigned char res21[0x1c]; 60f3807374SMinkyu Kang unsigned int err_blk_addr; /* 0x01E0 */ 614678d674SMinkyu Kang unsigned char res22[0xc]; 62f3807374SMinkyu Kang unsigned int flash_ver_id; /* 0x01F0 */ 634678d674SMinkyu Kang unsigned char res23[0x6c]; 64f3807374SMinkyu Kang unsigned int watchdog_cnt_low; /* 0x0260 */ 654678d674SMinkyu Kang unsigned char res24[0xc]; 66f3807374SMinkyu Kang unsigned int watchdog_cnt_hi; /* 0x0270 */ 674678d674SMinkyu Kang unsigned char res25[0xc]; 68f3807374SMinkyu Kang unsigned int sync_write; /* 0x0280 */ 694678d674SMinkyu Kang unsigned char res26[0x1c]; 70f3807374SMinkyu Kang unsigned int cold_reset; /* 0x02A0 */ 714678d674SMinkyu Kang unsigned char res27[0xc]; 72f3807374SMinkyu Kang unsigned int ddp_device; /* 0x02B0 */ 734678d674SMinkyu Kang unsigned char res28[0xc]; 74f3807374SMinkyu Kang unsigned int multi_plane; /* 0x02C0 */ 754678d674SMinkyu Kang unsigned char res29[0x1c]; 76f3807374SMinkyu Kang unsigned int trans_mode; /* 0x02E0 */ 774678d674SMinkyu Kang unsigned char res30[0x1c]; 78f3807374SMinkyu Kang unsigned int ecc_err_stat2; /* 0x0300 */ 794678d674SMinkyu Kang unsigned char res31[0xc]; 80f3807374SMinkyu Kang unsigned int ecc_err_stat3; /* 0x0310 */ 814678d674SMinkyu Kang unsigned char res32[0xc]; 82f3807374SMinkyu Kang unsigned int ecc_err_stat4; /* 0x0320 */ 834678d674SMinkyu Kang unsigned char res33[0x1c]; 84f3807374SMinkyu Kang unsigned int dev_page_size; /* 0x0340 */ 854678d674SMinkyu Kang unsigned char res34[0x4c]; 86f3807374SMinkyu Kang unsigned int int_mon_status; /* 0x0390 */ 874678d674SMinkyu Kang }; 884678d674SMinkyu Kang #endif 894678d674SMinkyu Kang 904678d674SMinkyu Kang #define ONENAND_MEM_RESET_HOT 0x3 914678d674SMinkyu Kang #define ONENAND_MEM_RESET_COLD 0x2 924678d674SMinkyu Kang #define ONENAND_MEM_RESET_WARM 0x1 934678d674SMinkyu Kang 944678d674SMinkyu Kang #define INT_ERR_ALL 0x3fff 954678d674SMinkyu Kang #define CACHE_OP_ERR (1 << 13) 964678d674SMinkyu Kang #define RST_CMP (1 << 12) 974678d674SMinkyu Kang #define RDY_ACT (1 << 11) 984678d674SMinkyu Kang #define INT_ACT (1 << 10) 994678d674SMinkyu Kang #define UNSUP_CMD (1 << 9) 1004678d674SMinkyu Kang #define LOCKED_BLK (1 << 8) 1014678d674SMinkyu Kang #define BLK_RW_CMP (1 << 7) 1024678d674SMinkyu Kang #define ERS_CMP (1 << 6) 1034678d674SMinkyu Kang #define PGM_CMP (1 << 5) 1044678d674SMinkyu Kang #define LOAD_CMP (1 << 4) 1054678d674SMinkyu Kang #define ERS_FAIL (1 << 3) 1064678d674SMinkyu Kang #define PGM_FAIL (1 << 2) 1074678d674SMinkyu Kang #define INT_TO (1 << 1) 1084678d674SMinkyu Kang #define LD_FAIL_ECC_ERR (1 << 0) 1094678d674SMinkyu Kang 1104678d674SMinkyu Kang #define TSRF (1 << 0) 1114678d674SMinkyu Kang 1124678d674SMinkyu Kang /* common initialize function */ 1134678d674SMinkyu Kang extern void s3c_onenand_init(struct mtd_info *); 1146b3967bbSLukasz Majewski extern int s5pc110_chip_probe(struct mtd_info *); 1156b3967bbSLukasz Majewski extern int s5pc210_chip_probe(struct mtd_info *); 1164678d674SMinkyu Kang 1174678d674SMinkyu Kang #endif 118