1 /* 2 * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com> 3 * Rohit Choraria <rohitkc@ti.com> 4 * 5 * (C) Copyright 2013 Andreas Bießmann <andreas.devel@googlemail.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 #ifndef __ASM_OMAP_GPMC_H 10 #define __ASM_OMAP_GPMC_H 11 12 #define GPMC_BUF_EMPTY 0 13 #define GPMC_BUF_FULL 1 14 #define GPMC_MAX_SECTORS 8 15 16 enum omap_ecc { 17 /* 1-bit ECC calculation by Software, Error detection by Software */ 18 OMAP_ECC_HAM1_CODE_SW = 1, /* avoid un-initialized int can be 0x0 */ 19 /* 1-bit ECC calculation by GPMC, Error detection by Software */ 20 /* ECC layout compatible to legacy ROMCODE. */ 21 OMAP_ECC_HAM1_CODE_HW, 22 /* 4-bit ECC calculation by GPMC, Error detection by Software */ 23 OMAP_ECC_BCH4_CODE_HW_DETECTION_SW, 24 /* 4-bit ECC calculation by GPMC, Error detection by ELM */ 25 OMAP_ECC_BCH4_CODE_HW, 26 /* 8-bit ECC calculation by GPMC, Error detection by Software */ 27 OMAP_ECC_BCH8_CODE_HW_DETECTION_SW, 28 /* 8-bit ECC calculation by GPMC, Error detection by ELM */ 29 OMAP_ECC_BCH8_CODE_HW, 30 }; 31 32 struct gpmc_cs { 33 u32 config1; /* 0x00 */ 34 u32 config2; /* 0x04 */ 35 u32 config3; /* 0x08 */ 36 u32 config4; /* 0x0C */ 37 u32 config5; /* 0x10 */ 38 u32 config6; /* 0x14 */ 39 u32 config7; /* 0x18 */ 40 u32 nand_cmd; /* 0x1C */ 41 u32 nand_adr; /* 0x20 */ 42 u32 nand_dat; /* 0x24 */ 43 u8 res[8]; /* blow up to 0x30 byte */ 44 }; 45 46 struct bch_res_0_3 { 47 u32 bch_result_x[4]; 48 }; 49 50 struct gpmc { 51 u8 res1[0x10]; 52 u32 sysconfig; /* 0x10 */ 53 u8 res2[0x4]; 54 u32 irqstatus; /* 0x18 */ 55 u32 irqenable; /* 0x1C */ 56 u8 res3[0x20]; 57 u32 timeout_control; /* 0x40 */ 58 u8 res4[0xC]; 59 u32 config; /* 0x50 */ 60 u32 status; /* 0x54 */ 61 u8 res5[0x8]; /* 0x58 */ 62 struct gpmc_cs cs[8]; /* 0x60, 0x90, .. */ 63 u8 res6[0x14]; /* 0x1E0 */ 64 u32 ecc_config; /* 0x1F4 */ 65 u32 ecc_control; /* 0x1F8 */ 66 u32 ecc_size_config; /* 0x1FC */ 67 u32 ecc1_result; /* 0x200 */ 68 u32 ecc2_result; /* 0x204 */ 69 u32 ecc3_result; /* 0x208 */ 70 u32 ecc4_result; /* 0x20C */ 71 u32 ecc5_result; /* 0x210 */ 72 u32 ecc6_result; /* 0x214 */ 73 u32 ecc7_result; /* 0x218 */ 74 u32 ecc8_result; /* 0x21C */ 75 u32 ecc9_result; /* 0x220 */ 76 u8 res7[12]; /* 0x224 */ 77 u32 testmomde_ctrl; /* 0x230 */ 78 u8 res8[12]; /* 0x234 */ 79 struct bch_res_0_3 bch_result_0_3[GPMC_MAX_SECTORS]; /* 0x240,0x250, */ 80 }; 81 82 /* Used for board specific gpmc initialization */ 83 extern struct gpmc *gpmc_cfg; 84 85 #endif /* __ASM_OMAP_GPMC_H */ 86