1ffc664e8SDave Liu /* 2*24b44844SDave Liu * Copyright 2003-2004 Red Hat, Inc. All rights reserved. 3*24b44844SDave Liu * Copyright 2003-2004 Jeff Garzik 4ffc664e8SDave Liu * Copyright (C) 2008 Freescale Semiconductor, Inc. 5ffc664e8SDave Liu * Dave Liu <daveliu@freescale.com> 6ffc664e8SDave Liu * port from libata of linux kernel 7ffc664e8SDave Liu * 8ffc664e8SDave Liu * This program is free software; you can redistribute it and/or 9ffc664e8SDave Liu * modify it under the terms of the GNU General Public License as 10ffc664e8SDave Liu * published by the Free Software Foundation; either version 2 of 11ffc664e8SDave Liu * the License, or (at your option) any later version. 12ffc664e8SDave Liu * 13ffc664e8SDave Liu * This program is distributed in the hope that it will be useful, 14ffc664e8SDave Liu * but WITHOUT ANY WARRANTY; without even the implied warranty of 15ffc664e8SDave Liu * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16ffc664e8SDave Liu * GNU General Public License for more details. 17ffc664e8SDave Liu * 18ffc664e8SDave Liu * You should have received a copy of the GNU General Public License 19ffc664e8SDave Liu * along with this program; if not, write to the Free Software 20ffc664e8SDave Liu * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21ffc664e8SDave Liu * MA 02111-1307 USA 22ffc664e8SDave Liu * 23ffc664e8SDave Liu */ 24ffc664e8SDave Liu 25ffc664e8SDave Liu #ifndef __LIBATA_H__ 26ffc664e8SDave Liu #define __LIBATA_H__ 27ffc664e8SDave Liu 28ffc664e8SDave Liu #include <common.h> 29ffc664e8SDave Liu 30*24b44844SDave Liu enum { 31*24b44844SDave Liu /* various global constants */ 32*24b44844SDave Liu ATA_MAX_DEVICES = 2, /* per bus/port */ 33*24b44844SDave Liu ATA_MAX_PRD = 256, /* we could make these 256/256 */ 34*24b44844SDave Liu ATA_SECT_SIZE = 512, 35*24b44844SDave Liu ATA_MAX_SECTORS_128 = 128, 36*24b44844SDave Liu ATA_MAX_SECTORS = 256, 37*24b44844SDave Liu ATA_MAX_SECTORS_LBA48 = 65535, 38*24b44844SDave Liu ATA_MAX_SECTORS_TAPE = 65535, 39*24b44844SDave Liu 40*24b44844SDave Liu ATA_ID_WORDS = 256, 41*24b44844SDave Liu ATA_ID_SERNO = 10, 42*24b44844SDave Liu ATA_ID_FW_REV = 23, 43*24b44844SDave Liu ATA_ID_PROD = 27, 44*24b44844SDave Liu ATA_ID_OLD_PIO_MODES = 51, 45*24b44844SDave Liu ATA_ID_FIELD_VALID = 53, 46*24b44844SDave Liu ATA_ID_LBA_SECTORS = 60, 47*24b44844SDave Liu ATA_ID_MWDMA_MODES = 63, 48*24b44844SDave Liu ATA_ID_PIO_MODES = 64, 49*24b44844SDave Liu ATA_ID_EIDE_DMA_MIN = 65, 50*24b44844SDave Liu ATA_ID_EIDE_PIO = 67, 51*24b44844SDave Liu ATA_ID_EIDE_PIO_IORDY = 68, 52*24b44844SDave Liu ATA_ID_PIO4 = (1 << 1), 53*24b44844SDave Liu ATA_ID_QUEUE_DEPTH = 75, 54*24b44844SDave Liu ATA_ID_SATA_CAP = 76, 55*24b44844SDave Liu ATA_ID_SATA_FEATURES = 78, 56*24b44844SDave Liu ATA_ID_SATA_FEATURES_EN = 79, 57*24b44844SDave Liu ATA_ID_MAJOR_VER = 80, 58*24b44844SDave Liu ATA_ID_MINOR_VER = 81, 59*24b44844SDave Liu ATA_ID_UDMA_MODES = 88, 60*24b44844SDave Liu ATA_ID_LBA48_SECTORS = 100, 61*24b44844SDave Liu 62*24b44844SDave Liu ATA_ID_SERNO_LEN = 20, 63*24b44844SDave Liu ATA_ID_FW_REV_LEN = 8, 64*24b44844SDave Liu ATA_ID_PROD_LEN = 40, 65*24b44844SDave Liu 66*24b44844SDave Liu ATA_PCI_CTL_OFS = 2, 67*24b44844SDave Liu 68*24b44844SDave Liu ATA_PIO0 = (1 << 0), 69*24b44844SDave Liu ATA_PIO1 = ATA_PIO0 | (1 << 1), 70*24b44844SDave Liu ATA_PIO2 = ATA_PIO1 | (1 << 2), 71*24b44844SDave Liu ATA_PIO3 = ATA_PIO2 | (1 << 3), 72*24b44844SDave Liu ATA_PIO4 = ATA_PIO3 | (1 << 4), 73*24b44844SDave Liu ATA_PIO5 = ATA_PIO4 | (1 << 5), 74*24b44844SDave Liu ATA_PIO6 = ATA_PIO5 | (1 << 6), 75*24b44844SDave Liu 76*24b44844SDave Liu ATA_SWDMA0 = (1 << 0), 77*24b44844SDave Liu ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1), 78*24b44844SDave Liu ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2), 79*24b44844SDave Liu 80*24b44844SDave Liu ATA_SWDMA2_ONLY = (1 << 2), 81*24b44844SDave Liu 82*24b44844SDave Liu ATA_MWDMA0 = (1 << 0), 83*24b44844SDave Liu ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1), 84*24b44844SDave Liu ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2), 85*24b44844SDave Liu 86*24b44844SDave Liu ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2), 87*24b44844SDave Liu ATA_MWDMA2_ONLY = (1 << 2), 88*24b44844SDave Liu 89*24b44844SDave Liu ATA_UDMA0 = (1 << 0), 90*24b44844SDave Liu ATA_UDMA1 = ATA_UDMA0 | (1 << 1), 91*24b44844SDave Liu ATA_UDMA2 = ATA_UDMA1 | (1 << 2), 92*24b44844SDave Liu ATA_UDMA3 = ATA_UDMA2 | (1 << 3), 93*24b44844SDave Liu ATA_UDMA4 = ATA_UDMA3 | (1 << 4), 94*24b44844SDave Liu ATA_UDMA5 = ATA_UDMA4 | (1 << 5), 95*24b44844SDave Liu ATA_UDMA6 = ATA_UDMA5 | (1 << 6), 96*24b44844SDave Liu ATA_UDMA7 = ATA_UDMA6 | (1 << 7), 97*24b44844SDave Liu /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */ 98*24b44844SDave Liu 99*24b44844SDave Liu ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */ 100*24b44844SDave Liu 101*24b44844SDave Liu /* DMA-related */ 102*24b44844SDave Liu ATA_PRD_SZ = 8, 103*24b44844SDave Liu ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ), 104*24b44844SDave Liu ATA_PRD_EOT = (1 << 31), /* end-of-table flag */ 105*24b44844SDave Liu 106*24b44844SDave Liu ATA_DMA_TABLE_OFS = 4, 107*24b44844SDave Liu ATA_DMA_STATUS = 2, 108*24b44844SDave Liu ATA_DMA_CMD = 0, 109*24b44844SDave Liu ATA_DMA_WR = (1 << 3), 110*24b44844SDave Liu ATA_DMA_START = (1 << 0), 111*24b44844SDave Liu ATA_DMA_INTR = (1 << 2), 112*24b44844SDave Liu ATA_DMA_ERR = (1 << 1), 113*24b44844SDave Liu ATA_DMA_ACTIVE = (1 << 0), 114*24b44844SDave Liu 115*24b44844SDave Liu /* bits in ATA command block registers */ 116*24b44844SDave Liu ATA_HOB = (1 << 7), /* LBA48 selector */ 117*24b44844SDave Liu ATA_NIEN = (1 << 1), /* disable-irq flag */ 118*24b44844SDave Liu ATA_LBA = (1 << 6), /* LBA28 selector */ 119*24b44844SDave Liu ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */ 120*24b44844SDave Liu ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */ 121*24b44844SDave Liu ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */ 122*24b44844SDave Liu ATA_BUSY = (1 << 7), /* BSY status bit */ 123*24b44844SDave Liu ATA_DRDY = (1 << 6), /* device ready */ 124*24b44844SDave Liu ATA_DF = (1 << 5), /* device fault */ 125*24b44844SDave Liu ATA_DRQ = (1 << 3), /* data request i/o */ 126*24b44844SDave Liu ATA_ERR = (1 << 0), /* have an error */ 127*24b44844SDave Liu ATA_SRST = (1 << 2), /* software reset */ 128*24b44844SDave Liu ATA_ICRC = (1 << 7), /* interface CRC error */ 129*24b44844SDave Liu ATA_UNC = (1 << 6), /* uncorrectable media error */ 130*24b44844SDave Liu ATA_IDNF = (1 << 4), /* ID not found */ 131*24b44844SDave Liu ATA_ABORTED = (1 << 2), /* command aborted */ 132*24b44844SDave Liu 133*24b44844SDave Liu /* ATA command block registers */ 134*24b44844SDave Liu ATA_REG_DATA = 0x00, 135*24b44844SDave Liu ATA_REG_ERR = 0x01, 136*24b44844SDave Liu ATA_REG_NSECT = 0x02, 137*24b44844SDave Liu ATA_REG_LBAL = 0x03, 138*24b44844SDave Liu ATA_REG_LBAM = 0x04, 139*24b44844SDave Liu ATA_REG_LBAH = 0x05, 140*24b44844SDave Liu ATA_REG_DEVICE = 0x06, 141*24b44844SDave Liu ATA_REG_STATUS = 0x07, 142*24b44844SDave Liu 143*24b44844SDave Liu ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */ 144*24b44844SDave Liu ATA_REG_CMD = ATA_REG_STATUS, 145*24b44844SDave Liu ATA_REG_BYTEL = ATA_REG_LBAM, 146*24b44844SDave Liu ATA_REG_BYTEH = ATA_REG_LBAH, 147*24b44844SDave Liu ATA_REG_DEVSEL = ATA_REG_DEVICE, 148*24b44844SDave Liu ATA_REG_IRQ = ATA_REG_NSECT, 149*24b44844SDave Liu 150*24b44844SDave Liu /* ATA device commands */ 151ffc664e8SDave Liu ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */ 152*24b44844SDave Liu ATA_CMD_CHK_POWER = 0xE5, /* check power mode */ 153*24b44844SDave Liu ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */ 154*24b44844SDave Liu ATA_CMD_IDLE = 0xE3, /* place in idle power mode */ 155*24b44844SDave Liu ATA_CMD_EDD = 0x90, /* execute device diagnostic */ 156*24b44844SDave Liu ATA_CMD_FLUSH = 0xE7, 157*24b44844SDave Liu ATA_CMD_FLUSH_EXT = 0xEA, 158ffc664e8SDave Liu ATA_CMD_ID_ATA = 0xEC, 159ffc664e8SDave Liu ATA_CMD_ID_ATAPI = 0xA1, 160*24b44844SDave Liu ATA_CMD_READ = 0xC8, 161*24b44844SDave Liu ATA_CMD_READ_EXT = 0x25, 162*24b44844SDave Liu ATA_CMD_WRITE = 0xCA, 163*24b44844SDave Liu ATA_CMD_WRITE_EXT = 0x35, 164*24b44844SDave Liu ATA_CMD_WRITE_FUA_EXT = 0x3D, 165*24b44844SDave Liu ATA_CMD_FPDMA_READ = 0x60, 166*24b44844SDave Liu ATA_CMD_FPDMA_WRITE = 0x61, 167ffc664e8SDave Liu ATA_CMD_PIO_READ = 0x20, 168ffc664e8SDave Liu ATA_CMD_PIO_READ_EXT = 0x24, 169ffc664e8SDave Liu ATA_CMD_PIO_WRITE = 0x30, 170ffc664e8SDave Liu ATA_CMD_PIO_WRITE_EXT = 0x34, 171*24b44844SDave Liu ATA_CMD_READ_MULTI = 0xC4, 172*24b44844SDave Liu ATA_CMD_READ_MULTI_EXT = 0x29, 173*24b44844SDave Liu ATA_CMD_WRITE_MULTI = 0xC5, 174*24b44844SDave Liu ATA_CMD_WRITE_MULTI_EXT = 0x39, 175*24b44844SDave Liu ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE, 176ffc664e8SDave Liu ATA_CMD_SET_FEATURES = 0xEF, 177*24b44844SDave Liu ATA_CMD_SET_MULTI = 0xC6, 178*24b44844SDave Liu ATA_CMD_PACKET = 0xA0, 179*24b44844SDave Liu ATA_CMD_VERIFY = 0x40, 180*24b44844SDave Liu ATA_CMD_VERIFY_EXT = 0x42, 181*24b44844SDave Liu ATA_CMD_STANDBYNOW1 = 0xE0, 182*24b44844SDave Liu ATA_CMD_IDLEIMMEDIATE = 0xE1, 183*24b44844SDave Liu ATA_CMD_SLEEP = 0xE6, 184*24b44844SDave Liu ATA_CMD_INIT_DEV_PARAMS = 0x91, 185*24b44844SDave Liu ATA_CMD_READ_NATIVE_MAX = 0xF8, 186*24b44844SDave Liu ATA_CMD_READ_NATIVE_MAX_EXT = 0x27, 187*24b44844SDave Liu ATA_CMD_SET_MAX = 0xF9, 188*24b44844SDave Liu ATA_CMD_SET_MAX_EXT = 0x37, 189*24b44844SDave Liu ATA_CMD_READ_LOG_EXT = 0x2f, 190*24b44844SDave Liu ATA_CMD_PMP_READ = 0xE4, 191*24b44844SDave Liu ATA_CMD_PMP_WRITE = 0xE8, 192*24b44844SDave Liu ATA_CMD_CONF_OVERLAY = 0xB1, 193*24b44844SDave Liu ATA_CMD_SEC_FREEZE_LOCK = 0xF5, 194ffc664e8SDave Liu 195*24b44844SDave Liu /* READ_LOG_EXT pages */ 196*24b44844SDave Liu ATA_LOG_SATA_NCQ = 0x10, 197ffc664e8SDave Liu 198*24b44844SDave Liu /* READ/WRITE LONG (obsolete) */ 199*24b44844SDave Liu ATA_CMD_READ_LONG = 0x22, 200*24b44844SDave Liu ATA_CMD_READ_LONG_ONCE = 0x23, 201*24b44844SDave Liu ATA_CMD_WRITE_LONG = 0x32, 202*24b44844SDave Liu ATA_CMD_WRITE_LONG_ONCE = 0x33, 203*24b44844SDave Liu 204ffc664e8SDave Liu /* SETFEATURES stuff */ 205ffc664e8SDave Liu SETFEATURES_XFER = 0x03, 206ffc664e8SDave Liu XFER_UDMA_7 = 0x47, 207ffc664e8SDave Liu XFER_UDMA_6 = 0x46, 208ffc664e8SDave Liu XFER_UDMA_5 = 0x45, 209ffc664e8SDave Liu XFER_UDMA_4 = 0x44, 210ffc664e8SDave Liu XFER_UDMA_3 = 0x43, 211ffc664e8SDave Liu XFER_UDMA_2 = 0x42, 212ffc664e8SDave Liu XFER_UDMA_1 = 0x41, 213ffc664e8SDave Liu XFER_UDMA_0 = 0x40, 214ffc664e8SDave Liu XFER_MW_DMA_4 = 0x24, /* CFA only */ 215ffc664e8SDave Liu XFER_MW_DMA_3 = 0x23, /* CFA only */ 216ffc664e8SDave Liu XFER_MW_DMA_2 = 0x22, 217ffc664e8SDave Liu XFER_MW_DMA_1 = 0x21, 218ffc664e8SDave Liu XFER_MW_DMA_0 = 0x20, 219*24b44844SDave Liu XFER_SW_DMA_2 = 0x12, 220*24b44844SDave Liu XFER_SW_DMA_1 = 0x11, 221*24b44844SDave Liu XFER_SW_DMA_0 = 0x10, 222ffc664e8SDave Liu XFER_PIO_6 = 0x0E, /* CFA only */ 223ffc664e8SDave Liu XFER_PIO_5 = 0x0D, /* CFA only */ 224ffc664e8SDave Liu XFER_PIO_4 = 0x0C, 225ffc664e8SDave Liu XFER_PIO_3 = 0x0B, 226ffc664e8SDave Liu XFER_PIO_2 = 0x0A, 227ffc664e8SDave Liu XFER_PIO_1 = 0x09, 228ffc664e8SDave Liu XFER_PIO_0 = 0x08, 229ffc664e8SDave Liu XFER_PIO_SLOW = 0x00, 230ffc664e8SDave Liu 231ffc664e8SDave Liu SETFEATURES_WC_ON = 0x02, /* Enable write cache */ 232ffc664e8SDave Liu SETFEATURES_WC_OFF = 0x82, /* Disable write cache */ 233ffc664e8SDave Liu 234ffc664e8SDave Liu SETFEATURES_SPINUP = 0x07, /* Spin-up drive */ 235*24b44844SDave Liu 236*24b44844SDave Liu SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */ 237*24b44844SDave Liu SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */ 238*24b44844SDave Liu 239*24b44844SDave Liu /* SETFEATURE Sector counts for SATA features */ 240*24b44844SDave Liu SATA_AN = 0x05, /* Asynchronous Notification */ 241*24b44844SDave Liu SATA_DIPM = 0x03, /* Device Initiated Power Management */ 242*24b44844SDave Liu 243*24b44844SDave Liu /* feature values for SET_MAX */ 244*24b44844SDave Liu ATA_SET_MAX_ADDR = 0x00, 245*24b44844SDave Liu ATA_SET_MAX_PASSWD = 0x01, 246*24b44844SDave Liu ATA_SET_MAX_LOCK = 0x02, 247*24b44844SDave Liu ATA_SET_MAX_UNLOCK = 0x03, 248*24b44844SDave Liu ATA_SET_MAX_FREEZE_LOCK = 0x04, 249*24b44844SDave Liu 250*24b44844SDave Liu /* feature values for DEVICE CONFIGURATION OVERLAY */ 251*24b44844SDave Liu ATA_DCO_RESTORE = 0xC0, 252*24b44844SDave Liu ATA_DCO_FREEZE_LOCK = 0xC1, 253*24b44844SDave Liu ATA_DCO_IDENTIFY = 0xC2, 254*24b44844SDave Liu ATA_DCO_SET = 0xC3, 255*24b44844SDave Liu 256*24b44844SDave Liu /* ATAPI stuff */ 257*24b44844SDave Liu ATAPI_PKT_DMA = (1 << 0), 258*24b44844SDave Liu ATAPI_DMADIR = (1 << 2), /* ATAPI data dir: 259*24b44844SDave Liu 0=to device, 1=to host */ 260*24b44844SDave Liu ATAPI_CDB_LEN = 16, 261*24b44844SDave Liu 262*24b44844SDave Liu /* PMP stuff */ 263*24b44844SDave Liu SATA_PMP_MAX_PORTS = 15, 264*24b44844SDave Liu SATA_PMP_CTRL_PORT = 15, 265*24b44844SDave Liu 266*24b44844SDave Liu SATA_PMP_GSCR_DWORDS = 128, 267*24b44844SDave Liu SATA_PMP_GSCR_PROD_ID = 0, 268*24b44844SDave Liu SATA_PMP_GSCR_REV = 1, 269*24b44844SDave Liu SATA_PMP_GSCR_PORT_INFO = 2, 270*24b44844SDave Liu SATA_PMP_GSCR_ERROR = 32, 271*24b44844SDave Liu SATA_PMP_GSCR_ERROR_EN = 33, 272*24b44844SDave Liu SATA_PMP_GSCR_FEAT = 64, 273*24b44844SDave Liu SATA_PMP_GSCR_FEAT_EN = 96, 274*24b44844SDave Liu 275*24b44844SDave Liu SATA_PMP_PSCR_STATUS = 0, 276*24b44844SDave Liu SATA_PMP_PSCR_ERROR = 1, 277*24b44844SDave Liu SATA_PMP_PSCR_CONTROL = 2, 278*24b44844SDave Liu 279*24b44844SDave Liu SATA_PMP_FEAT_BIST = (1 << 0), 280*24b44844SDave Liu SATA_PMP_FEAT_PMREQ = (1 << 1), 281*24b44844SDave Liu SATA_PMP_FEAT_DYNSSC = (1 << 2), 282*24b44844SDave Liu SATA_PMP_FEAT_NOTIFY = (1 << 3), 283*24b44844SDave Liu 284*24b44844SDave Liu /* cable types */ 285*24b44844SDave Liu ATA_CBL_NONE = 0, 286*24b44844SDave Liu ATA_CBL_PATA40 = 1, 287*24b44844SDave Liu ATA_CBL_PATA80 = 2, 288*24b44844SDave Liu ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */ 289*24b44844SDave Liu ATA_CBL_PATA_UNK = 4, /* don't know, maybe 80c? */ 290*24b44844SDave Liu ATA_CBL_PATA_IGN = 5, /* don't know, ignore cable handling */ 291*24b44844SDave Liu ATA_CBL_SATA = 6, 292*24b44844SDave Liu 293*24b44844SDave Liu /* SATA Status and Control Registers */ 294*24b44844SDave Liu SCR_STATUS = 0, 295*24b44844SDave Liu SCR_ERROR = 1, 296*24b44844SDave Liu SCR_CONTROL = 2, 297*24b44844SDave Liu SCR_ACTIVE = 3, 298*24b44844SDave Liu SCR_NOTIFICATION = 4, 299*24b44844SDave Liu 300*24b44844SDave Liu /* SError bits */ 301*24b44844SDave Liu SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */ 302*24b44844SDave Liu SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */ 303*24b44844SDave Liu SERR_DATA = (1 << 8), /* unrecovered data error */ 304*24b44844SDave Liu SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */ 305*24b44844SDave Liu SERR_PROTOCOL = (1 << 10), /* protocol violation */ 306*24b44844SDave Liu SERR_INTERNAL = (1 << 11), /* host internal error */ 307*24b44844SDave Liu SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */ 308*24b44844SDave Liu SERR_PHY_INT_ERR = (1 << 17), /* PHY internal error */ 309*24b44844SDave Liu SERR_COMM_WAKE = (1 << 18), /* Comm wake */ 310*24b44844SDave Liu SERR_10B_8B_ERR = (1 << 19), /* 10b to 8b decode error */ 311*24b44844SDave Liu SERR_DISPARITY = (1 << 20), /* Disparity */ 312*24b44844SDave Liu SERR_CRC = (1 << 21), /* CRC error */ 313*24b44844SDave Liu SERR_HANDSHAKE = (1 << 22), /* Handshake error */ 314*24b44844SDave Liu SERR_LINK_SEQ_ERR = (1 << 23), /* Link sequence error */ 315*24b44844SDave Liu SERR_TRANS_ST_ERROR = (1 << 24), /* Transport state trans. error */ 316*24b44844SDave Liu SERR_UNRECOG_FIS = (1 << 25), /* Unrecognized FIS */ 317*24b44844SDave Liu SERR_DEV_XCHG = (1 << 26), /* device exchanged */ 318*24b44844SDave Liu 319*24b44844SDave Liu /* struct ata_taskfile flags */ 320*24b44844SDave Liu ATA_TFLAG_LBA48 = (1 << 0), /* enable 48-bit LBA and "HOB" */ 321*24b44844SDave Liu ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */ 322*24b44844SDave Liu ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */ 323*24b44844SDave Liu ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */ 324*24b44844SDave Liu ATA_TFLAG_LBA = (1 << 4), /* enable LBA */ 325*24b44844SDave Liu ATA_TFLAG_FUA = (1 << 5), /* enable FUA */ 326*24b44844SDave Liu ATA_TFLAG_POLLING = (1 << 6), /* set nIEN to 1 and use polling */ 327*24b44844SDave Liu 328*24b44844SDave Liu /* protocol flags */ 329*24b44844SDave Liu ATA_PROT_FLAG_PIO = (1 << 0), /* is PIO */ 330*24b44844SDave Liu ATA_PROT_FLAG_DMA = (1 << 1), /* is DMA */ 331*24b44844SDave Liu ATA_PROT_FLAG_DATA = ATA_PROT_FLAG_PIO | ATA_PROT_FLAG_DMA, 332*24b44844SDave Liu ATA_PROT_FLAG_NCQ = (1 << 2), /* is NCQ */ 333*24b44844SDave Liu ATA_PROT_FLAG_ATAPI = (1 << 3), /* is ATAPI */ 334ffc664e8SDave Liu }; 335ffc664e8SDave Liu 336*24b44844SDave Liu enum ata_tf_protocols { 337*24b44844SDave Liu /* ATA taskfile protocols */ 338*24b44844SDave Liu ATA_PROT_UNKNOWN, /* unknown/invalid */ 339ffc664e8SDave Liu ATA_PROT_NODATA, /* no data */ 340ffc664e8SDave Liu ATA_PROT_PIO, /* PIO data xfer */ 341ffc664e8SDave Liu ATA_PROT_DMA, /* DMA */ 342ffc664e8SDave Liu ATA_PROT_NCQ, /* NCQ */ 343*24b44844SDave Liu ATAPI_PROT_NODATA, /* packet command, no data */ 344*24b44844SDave Liu ATAPI_PROT_PIO, /* packet command, PIO data xfer*/ 345*24b44844SDave Liu ATAPI_PROT_DMA, /* packet command with special DMA sauce */ 346*24b44844SDave Liu }; 347*24b44844SDave Liu 348*24b44844SDave Liu enum ata_ioctls { 349*24b44844SDave Liu ATA_IOC_GET_IO32 = 0x309, 350*24b44844SDave Liu ATA_IOC_SET_IO32 = 0x324, 351ffc664e8SDave Liu }; 352ffc664e8SDave Liu 353ffc664e8SDave Liu enum ata_dev_typed { 354ffc664e8SDave Liu ATA_DEV_ATA, /* ATA device */ 355ffc664e8SDave Liu ATA_DEV_ATAPI, /* ATAPI device */ 356ffc664e8SDave Liu ATA_DEV_PMP, /* Port Multiplier Port */ 357ffc664e8SDave Liu ATA_DEV_UNKNOWN, /* unknown */ 358ffc664e8SDave Liu }; 359ffc664e8SDave Liu 360*24b44844SDave Liu struct ata_taskfile { 361*24b44844SDave Liu unsigned long flags; /* ATA_TFLAG_xxx */ 362*24b44844SDave Liu u8 protocol; /* ATA_PROT_xxx */ 363ffc664e8SDave Liu 364*24b44844SDave Liu u8 ctl; /* control reg */ 365ffc664e8SDave Liu 366*24b44844SDave Liu u8 hob_feature; /* additional data */ 367*24b44844SDave Liu u8 hob_nsect; /* to support LBA48 */ 368*24b44844SDave Liu u8 hob_lbal; 369*24b44844SDave Liu u8 hob_lbam; 370*24b44844SDave Liu u8 hob_lbah; 371ffc664e8SDave Liu 372*24b44844SDave Liu u8 feature; 373*24b44844SDave Liu u8 nsect; 374*24b44844SDave Liu u8 lbal; 375*24b44844SDave Liu u8 lbam; 376*24b44844SDave Liu u8 lbah; 377ffc664e8SDave Liu 378*24b44844SDave Liu u8 device; 379ffc664e8SDave Liu 380*24b44844SDave Liu u8 command; /* IO operation */ 381ffc664e8SDave Liu }; 382ffc664e8SDave Liu 383*24b44844SDave Liu /* 384*24b44844SDave Liu * protocol tests 385*24b44844SDave Liu */ 386*24b44844SDave Liu static inline unsigned int ata_prot_flags(u8 prot) 387*24b44844SDave Liu { 388*24b44844SDave Liu switch (prot) { 389*24b44844SDave Liu case ATA_PROT_NODATA: 390*24b44844SDave Liu return 0; 391*24b44844SDave Liu case ATA_PROT_PIO: 392*24b44844SDave Liu return ATA_PROT_FLAG_PIO; 393*24b44844SDave Liu case ATA_PROT_DMA: 394*24b44844SDave Liu return ATA_PROT_FLAG_DMA; 395*24b44844SDave Liu case ATA_PROT_NCQ: 396*24b44844SDave Liu return ATA_PROT_FLAG_DMA | ATA_PROT_FLAG_NCQ; 397*24b44844SDave Liu case ATAPI_PROT_NODATA: 398*24b44844SDave Liu return ATA_PROT_FLAG_ATAPI; 399*24b44844SDave Liu case ATAPI_PROT_PIO: 400*24b44844SDave Liu return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_PIO; 401*24b44844SDave Liu case ATAPI_PROT_DMA: 402*24b44844SDave Liu return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_DMA; 403*24b44844SDave Liu } 404*24b44844SDave Liu return 0; 405*24b44844SDave Liu } 406*24b44844SDave Liu 407*24b44844SDave Liu static inline int ata_is_atapi(u8 prot) 408*24b44844SDave Liu { 409*24b44844SDave Liu return ata_prot_flags(prot) & ATA_PROT_FLAG_ATAPI; 410*24b44844SDave Liu } 411*24b44844SDave Liu 412*24b44844SDave Liu static inline int ata_is_nodata(u8 prot) 413*24b44844SDave Liu { 414*24b44844SDave Liu return !(ata_prot_flags(prot) & ATA_PROT_FLAG_DATA); 415*24b44844SDave Liu } 416*24b44844SDave Liu 417*24b44844SDave Liu static inline int ata_is_pio(u8 prot) 418*24b44844SDave Liu { 419*24b44844SDave Liu return ata_prot_flags(prot) & ATA_PROT_FLAG_PIO; 420*24b44844SDave Liu } 421*24b44844SDave Liu 422*24b44844SDave Liu static inline int ata_is_dma(u8 prot) 423*24b44844SDave Liu { 424*24b44844SDave Liu return ata_prot_flags(prot) & ATA_PROT_FLAG_DMA; 425*24b44844SDave Liu } 426*24b44844SDave Liu 427*24b44844SDave Liu static inline int ata_is_ncq(u8 prot) 428*24b44844SDave Liu { 429*24b44844SDave Liu return ata_prot_flags(prot) & ATA_PROT_FLAG_NCQ; 430*24b44844SDave Liu } 431*24b44844SDave Liu 432*24b44844SDave Liu static inline int ata_is_data(u8 prot) 433*24b44844SDave Liu { 434*24b44844SDave Liu return ata_prot_flags(prot) & ATA_PROT_FLAG_DATA; 435*24b44844SDave Liu } 436*24b44844SDave Liu 437*24b44844SDave Liu /* 438*24b44844SDave Liu * id tests 439*24b44844SDave Liu */ 440ffc664e8SDave Liu #define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0) 441ffc664e8SDave Liu #define ata_id_has_lba(id) ((id)[49] & (1 << 9)) 442ffc664e8SDave Liu #define ata_id_has_dma(id) ((id)[49] & (1 << 8)) 443ffc664e8SDave Liu #define ata_id_has_ncq(id) ((id)[76] & (1 << 8)) 444ffc664e8SDave Liu #define ata_id_queue_depth(id) (((id)[75] & 0x1f) + 1) 445*24b44844SDave Liu #define ata_id_removeable(id) ((id)[0] & (1 << 7)) 446*24b44844SDave Liu #define ata_id_iordy_disable(id) ((id)[49] & (1 << 10)) 447*24b44844SDave Liu #define ata_id_has_iordy(id) ((id)[49] & (1 << 11)) 448ffc664e8SDave Liu 449ffc664e8SDave Liu #define ata_id_u32(id,n) \ 450ffc664e8SDave Liu (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)])) 451ffc664e8SDave Liu #define ata_id_u64(id,n) \ 452ffc664e8SDave Liu ( ((u64) (id)[(n) + 3] << 48) | \ 453ffc664e8SDave Liu ((u64) (id)[(n) + 2] << 32) | \ 454ffc664e8SDave Liu ((u64) (id)[(n) + 1] << 16) | \ 455ffc664e8SDave Liu ((u64) (id)[(n) + 0]) ) 456ffc664e8SDave Liu 457*24b44844SDave Liu #define ata_id_cdb_intr(id) (((id)[0] & 0x60) == 0x20) 458*24b44844SDave Liu 459*24b44844SDave Liu static inline int ata_id_has_fua(const u16 *id) 460*24b44844SDave Liu { 461*24b44844SDave Liu if ((id[84] & 0xC000) != 0x4000) 462*24b44844SDave Liu return 0; 463*24b44844SDave Liu return id[84] & (1 << 6); 464*24b44844SDave Liu } 465*24b44844SDave Liu 466*24b44844SDave Liu static inline int ata_id_has_flush(const u16 *id) 467*24b44844SDave Liu { 468*24b44844SDave Liu if ((id[83] & 0xC000) != 0x4000) 469*24b44844SDave Liu return 0; 470*24b44844SDave Liu return id[83] & (1 << 12); 471*24b44844SDave Liu } 472*24b44844SDave Liu 473*24b44844SDave Liu static inline int ata_id_has_flush_ext(const u16 *id) 474*24b44844SDave Liu { 475*24b44844SDave Liu if ((id[83] & 0xC000) != 0x4000) 476*24b44844SDave Liu return 0; 477*24b44844SDave Liu return id[83] & (1 << 13); 478*24b44844SDave Liu } 479*24b44844SDave Liu 480*24b44844SDave Liu static inline int ata_id_has_lba48(const u16 *id) 481*24b44844SDave Liu { 482*24b44844SDave Liu if ((id[83] & 0xC000) != 0x4000) 483*24b44844SDave Liu return 0; 484*24b44844SDave Liu if (!ata_id_u64(id, 100)) 485*24b44844SDave Liu return 0; 486*24b44844SDave Liu return id[83] & (1 << 10); 487*24b44844SDave Liu } 488*24b44844SDave Liu 489*24b44844SDave Liu static inline int ata_id_hpa_enabled(const u16 *id) 490*24b44844SDave Liu { 491*24b44844SDave Liu /* Yes children, word 83 valid bits cover word 82 data */ 492*24b44844SDave Liu if ((id[83] & 0xC000) != 0x4000) 493*24b44844SDave Liu return 0; 494*24b44844SDave Liu /* And 87 covers 85-87 */ 495*24b44844SDave Liu if ((id[87] & 0xC000) != 0x4000) 496*24b44844SDave Liu return 0; 497*24b44844SDave Liu /* Check command sets enabled as well as supported */ 498*24b44844SDave Liu if ((id[85] & ( 1 << 10)) == 0) 499*24b44844SDave Liu return 0; 500*24b44844SDave Liu return id[82] & (1 << 10); 501*24b44844SDave Liu } 502*24b44844SDave Liu 503*24b44844SDave Liu static inline int ata_id_has_wcache(const u16 *id) 504*24b44844SDave Liu { 505*24b44844SDave Liu /* Yes children, word 83 valid bits cover word 82 data */ 506*24b44844SDave Liu if ((id[83] & 0xC000) != 0x4000) 507*24b44844SDave Liu return 0; 508*24b44844SDave Liu return id[82] & (1 << 5); 509*24b44844SDave Liu } 510*24b44844SDave Liu 511*24b44844SDave Liu static inline int ata_id_has_pm(const u16 *id) 512*24b44844SDave Liu { 513*24b44844SDave Liu if ((id[83] & 0xC000) != 0x4000) 514*24b44844SDave Liu return 0; 515*24b44844SDave Liu return id[82] & (1 << 3); 516*24b44844SDave Liu } 517*24b44844SDave Liu 518*24b44844SDave Liu static inline int ata_id_rahead_enabled(const u16 *id) 519*24b44844SDave Liu { 520*24b44844SDave Liu if ((id[87] & 0xC000) != 0x4000) 521*24b44844SDave Liu return 0; 522*24b44844SDave Liu return id[85] & (1 << 6); 523*24b44844SDave Liu } 524*24b44844SDave Liu 525*24b44844SDave Liu static inline int ata_id_wcache_enabled(const u16 *id) 526*24b44844SDave Liu { 527*24b44844SDave Liu if ((id[87] & 0xC000) != 0x4000) 528*24b44844SDave Liu return 0; 529*24b44844SDave Liu return id[85] & (1 << 5); 530*24b44844SDave Liu } 531ffc664e8SDave Liu 532ffc664e8SDave Liu static inline unsigned int ata_id_major_version(const u16 *id) 533ffc664e8SDave Liu { 534ffc664e8SDave Liu unsigned int mver; 535ffc664e8SDave Liu 536ffc664e8SDave Liu if (id[ATA_ID_MAJOR_VER] == 0xFFFF) 537ffc664e8SDave Liu return 0; 538ffc664e8SDave Liu 539ffc664e8SDave Liu for (mver = 14; mver >= 1; mver--) 540ffc664e8SDave Liu if (id[ATA_ID_MAJOR_VER] & (1 << mver)) 541ffc664e8SDave Liu break; 542ffc664e8SDave Liu return mver; 543ffc664e8SDave Liu } 544ffc664e8SDave Liu 545ffc664e8SDave Liu static inline int ata_id_is_sata(const u16 *id) 546ffc664e8SDave Liu { 547ffc664e8SDave Liu return ata_id_major_version(id) >= 5 && id[93] == 0; 548ffc664e8SDave Liu } 549ffc664e8SDave Liu 550*24b44844SDave Liu static inline int ata_id_has_tpm(const u16 *id) 551*24b44844SDave Liu { 552*24b44844SDave Liu /* The TPM bits are only valid on ATA8 */ 553*24b44844SDave Liu if (ata_id_major_version(id) < 8) 554*24b44844SDave Liu return 0; 555*24b44844SDave Liu if ((id[48] & 0xC000) != 0x4000) 556*24b44844SDave Liu return 0; 557*24b44844SDave Liu return id[48] & (1 << 0); 558*24b44844SDave Liu } 559*24b44844SDave Liu 560*24b44844SDave Liu static inline int ata_id_has_dword_io(const u16 *id) 561*24b44844SDave Liu { 562*24b44844SDave Liu /* ATA 8 reuses this flag for "trusted" computing */ 563*24b44844SDave Liu if (ata_id_major_version(id) > 7) 564*24b44844SDave Liu return 0; 565*24b44844SDave Liu if (id[48] & (1 << 0)) 566*24b44844SDave Liu return 1; 567*24b44844SDave Liu return 0; 568*24b44844SDave Liu } 569*24b44844SDave Liu 570*24b44844SDave Liu static inline int ata_id_current_chs_valid(const u16 *id) 571*24b44844SDave Liu { 572*24b44844SDave Liu /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command 573*24b44844SDave Liu has not been issued to the device then the values of 574*24b44844SDave Liu id[54] to id[56] are vendor specific. */ 575*24b44844SDave Liu return (id[53] & 0x01) && /* Current translation valid */ 576*24b44844SDave Liu id[54] && /* cylinders in current translation */ 577*24b44844SDave Liu id[55] && /* heads in current translation */ 578*24b44844SDave Liu id[55] <= 16 && 579*24b44844SDave Liu id[56]; /* sectors in current translation */ 580*24b44844SDave Liu } 581*24b44844SDave Liu 582*24b44844SDave Liu static inline int ata_id_is_cfa(const u16 *id) 583*24b44844SDave Liu { 584*24b44844SDave Liu u16 v = id[0]; 585*24b44844SDave Liu if (v == 0x848A) /* Standard CF */ 586*24b44844SDave Liu return 1; 587*24b44844SDave Liu /* Could be CF hiding as standard ATA */ 588*24b44844SDave Liu if (ata_id_major_version(id) >= 3 && id[82] != 0xFFFF && 589*24b44844SDave Liu (id[82] & ( 1 << 2))) 590*24b44844SDave Liu return 1; 591*24b44844SDave Liu return 0; 592*24b44844SDave Liu } 593*24b44844SDave Liu 594*24b44844SDave Liu static inline int ata_drive_40wire(const u16 *dev_id) 595*24b44844SDave Liu { 596*24b44844SDave Liu if (ata_id_is_sata(dev_id)) 597*24b44844SDave Liu return 0; /* SATA */ 598*24b44844SDave Liu if ((dev_id[93] & 0xE000) == 0x6000) 599*24b44844SDave Liu return 0; /* 80 wire */ 600*24b44844SDave Liu return 1; 601*24b44844SDave Liu } 602*24b44844SDave Liu 603*24b44844SDave Liu static inline int ata_drive_40wire_relaxed(const u16 *dev_id) 604*24b44844SDave Liu { 605*24b44844SDave Liu if ((dev_id[93] & 0x2000) == 0x2000) 606*24b44844SDave Liu return 0; /* 80 wire */ 607*24b44844SDave Liu return 1; 608*24b44844SDave Liu } 609*24b44844SDave Liu 610*24b44844SDave Liu static inline int atapi_cdb_len(const u16 *dev_id) 611*24b44844SDave Liu { 612*24b44844SDave Liu u16 tmp = dev_id[0] & 0x3; 613*24b44844SDave Liu switch (tmp) { 614*24b44844SDave Liu case 0: return 12; 615*24b44844SDave Liu case 1: return 16; 616*24b44844SDave Liu default: return -1; 617*24b44844SDave Liu } 618*24b44844SDave Liu } 619*24b44844SDave Liu 620*24b44844SDave Liu static inline int atapi_command_packet_set(const u16 *dev_id) 621*24b44844SDave Liu { 622*24b44844SDave Liu return (dev_id[0] >> 8) & 0x1f; 623*24b44844SDave Liu } 624*24b44844SDave Liu 625*24b44844SDave Liu static inline int atapi_id_dmadir(const u16 *dev_id) 626*24b44844SDave Liu { 627*24b44844SDave Liu return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000); 628*24b44844SDave Liu } 629*24b44844SDave Liu 630*24b44844SDave Liu static inline int is_multi_taskfile(struct ata_taskfile *tf) 631*24b44844SDave Liu { 632*24b44844SDave Liu return (tf->command == ATA_CMD_READ_MULTI) || 633*24b44844SDave Liu (tf->command == ATA_CMD_WRITE_MULTI) || 634*24b44844SDave Liu (tf->command == ATA_CMD_READ_MULTI_EXT) || 635*24b44844SDave Liu (tf->command == ATA_CMD_WRITE_MULTI_EXT) || 636*24b44844SDave Liu (tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT); 637*24b44844SDave Liu } 638*24b44844SDave Liu 639*24b44844SDave Liu static inline int ata_ok(u8 status) 640*24b44844SDave Liu { 641*24b44844SDave Liu return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR)) 642*24b44844SDave Liu == ATA_DRDY); 643*24b44844SDave Liu } 644*24b44844SDave Liu 645*24b44844SDave Liu static inline int lba_28_ok(u64 block, u32 n_block) 646*24b44844SDave Liu { 647*24b44844SDave Liu /* check the ending block number */ 648*24b44844SDave Liu return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256); 649*24b44844SDave Liu } 650*24b44844SDave Liu 651*24b44844SDave Liu static inline int lba_48_ok(u64 block, u32 n_block) 652*24b44844SDave Liu { 653*24b44844SDave Liu /* check the ending block number */ 654*24b44844SDave Liu return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536); 655*24b44844SDave Liu } 656*24b44844SDave Liu 657*24b44844SDave Liu #define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff) 658*24b44844SDave Liu #define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16) 659*24b44844SDave Liu #define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff) 660*24b44844SDave Liu #define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf) 661*24b44844SDave Liu 662ffc664e8SDave Liu u64 ata_id_n_sectors(u16 *id); 663ffc664e8SDave Liu u32 ata_dev_classify(u32 sig); 664ffc664e8SDave Liu void ata_id_c_string(const u16 *id, unsigned char *s, 665ffc664e8SDave Liu unsigned int ofs, unsigned int len); 666ffc664e8SDave Liu void ata_dump_id(u16 *id); 667ffc664e8SDave Liu void ata_swap_buf_le16(u16 *buf, unsigned int buf_words); 668ffc664e8SDave Liu 669ffc664e8SDave Liu #endif /* __LIBATA_H__ */ 670