xref: /rk3399_rockchip-uboot/include/lcd.h (revision 5a4c59be8968ed332faedfaa534b4469fb4db3c4)
1 /*
2  * MPC823 and PXA LCD Controller
3  *
4  * Modeled after video interface by Paolo Scaffardi
5  *
6  *
7  * (C) Copyright 2001
8  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9  *
10  * See file CREDITS for list of people who contributed to this
11  * project.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License as
15  * published by the Free Software Foundation; either version 2 of
16  * the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software
25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26  * MA 02111-1307 USA
27  */
28 
29 #ifndef _LCD_H_
30 #define _LCD_H_
31 
32 extern char lcd_is_enabled;
33 
34 extern int lcd_line_length;
35 extern int lcd_color_fg;
36 extern int lcd_color_bg;
37 
38 /*
39  * Frame buffer memory information
40  */
41 extern void *lcd_base;		/* Start of framebuffer memory	*/
42 extern void *lcd_console_address;	/* Start of console buffer	*/
43 
44 extern short console_col;
45 extern short console_row;
46 extern struct vidinfo panel_info;
47 
48 extern void lcd_ctrl_init (void *lcdbase);
49 extern void lcd_enable (void);
50 
51 /* setcolreg used in 8bpp/16bpp; initcolregs used in monochrome */
52 extern void lcd_setcolreg (ushort regno,
53 				ushort red, ushort green, ushort blue);
54 extern void lcd_initcolregs (void);
55 
56 /* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */
57 extern struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp);
58 extern int bmp_display(ulong addr, int x, int y);
59 
60 #if defined CONFIG_MPC823
61 /*
62  * LCD controller stucture for MPC823 CPU
63  */
64 typedef struct vidinfo {
65 	ushort	vl_col;		/* Number of columns (i.e. 640) */
66 	ushort	vl_row;		/* Number of rows (i.e. 480) */
67 	ushort	vl_width;	/* Width of display area in millimeters */
68 	ushort	vl_height;	/* Height of display area in millimeters */
69 
70 	/* LCD configuration register */
71 	u_char	vl_clkp;	/* Clock polarity */
72 	u_char	vl_oep;		/* Output Enable polarity */
73 	u_char	vl_hsp;		/* Horizontal Sync polarity */
74 	u_char	vl_vsp;		/* Vertical Sync polarity */
75 	u_char	vl_dp;		/* Data polarity */
76 	u_char	vl_bpix;	/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8 */
77 	u_char	vl_lbw;		/* LCD Bus width, 0 = 4, 1 = 8 */
78 	u_char	vl_splt;	/* Split display, 0 = single-scan, 1 = dual-scan */
79 	u_char	vl_clor;	/* Color, 0 = mono, 1 = color */
80 	u_char	vl_tft;		/* 0 = passive, 1 = TFT */
81 
82 	/* Horizontal control register. Timing from data sheet */
83 	ushort	vl_wbl;		/* Wait between lines */
84 
85 	/* Vertical control register */
86 	u_char	vl_vpw;		/* Vertical sync pulse width */
87 	u_char	vl_lcdac;	/* LCD AC timing */
88 	u_char	vl_wbf;		/* Wait between frames */
89 } vidinfo_t;
90 
91 #elif defined(CONFIG_CPU_PXA25X) || defined(CONFIG_CPU_PXA27X) || \
92 	defined CONFIG_CPU_MONAHANS
93 /*
94  * PXA LCD DMA descriptor
95  */
96 struct pxafb_dma_descriptor {
97 	u_long	fdadr;		/* Frame descriptor address register */
98 	u_long	fsadr;		/* Frame source address register */
99 	u_long	fidr;		/* Frame ID register */
100 	u_long	ldcmd;		/* Command register */
101 };
102 
103 /*
104  * PXA LCD info
105  */
106 struct pxafb_info {
107 
108 	/* Misc registers */
109 	u_long	reg_lccr3;
110 	u_long	reg_lccr2;
111 	u_long	reg_lccr1;
112 	u_long	reg_lccr0;
113 	u_long	fdadr0;
114 	u_long	fdadr1;
115 
116 	/* DMA descriptors */
117 	struct	pxafb_dma_descriptor *	dmadesc_fblow;
118 	struct	pxafb_dma_descriptor *	dmadesc_fbhigh;
119 	struct	pxafb_dma_descriptor *	dmadesc_palette;
120 
121 	u_long	screen;		/* physical address of frame buffer */
122 	u_long	palette;	/* physical address of palette memory */
123 	u_int	palette_size;
124 };
125 
126 /*
127  * LCD controller stucture for PXA CPU
128  */
129 typedef struct vidinfo {
130 	ushort	vl_col;		/* Number of columns (i.e. 640) */
131 	ushort	vl_row;		/* Number of rows (i.e. 480) */
132 	ushort	vl_width;	/* Width of display area in millimeters */
133 	ushort	vl_height;	/* Height of display area in millimeters */
134 
135 	/* LCD configuration register */
136 	u_char	vl_clkp;	/* Clock polarity */
137 	u_char	vl_oep;		/* Output Enable polarity */
138 	u_char	vl_hsp;		/* Horizontal Sync polarity */
139 	u_char	vl_vsp;		/* Vertical Sync polarity */
140 	u_char	vl_dp;		/* Data polarity */
141 	u_char	vl_bpix;	/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
142 	u_char	vl_lbw;		/* LCD Bus width, 0 = 4, 1 = 8 */
143 	u_char	vl_splt;	/* Split display, 0 = single-scan, 1 = dual-scan */
144 	u_char	vl_clor;	/* Color, 0 = mono, 1 = color */
145 	u_char	vl_tft;		/* 0 = passive, 1 = TFT */
146 
147 	/* Horizontal control register. Timing from data sheet */
148 	ushort	vl_hpw;		/* Horz sync pulse width */
149 	u_char	vl_blw;		/* Wait before of line */
150 	u_char	vl_elw;		/* Wait end of line */
151 
152 	/* Vertical control register. */
153 	u_char	vl_vpw;		/* Vertical sync pulse width */
154 	u_char	vl_bfw;		/* Wait before of frame */
155 	u_char	vl_efw;		/* Wait end of frame */
156 
157 	/* PXA LCD controller params */
158 	struct	pxafb_info pxa;
159 } vidinfo_t;
160 
161 #elif defined(CONFIG_ATMEL_LCD)
162 
163 typedef struct vidinfo {
164 	ushort vl_col;		/* Number of columns (i.e. 640) */
165 	ushort vl_row;		/* Number of rows (i.e. 480) */
166 	u_long vl_clk;	/* pixel clock in ps    */
167 
168 	/* LCD configuration register */
169 	u_long vl_sync;		/* Horizontal / vertical sync */
170 	u_long vl_bpix;		/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
171 	u_long vl_tft;		/* 0 = passive, 1 = TFT */
172 	u_long vl_cont_pol_low;	/* contrast polarity is low */
173 
174 	/* Horizontal control register. */
175 	u_long vl_hsync_len;	/* Length of horizontal sync */
176 	u_long vl_left_margin;	/* Time from sync to picture */
177 	u_long vl_right_margin;	/* Time from picture to sync */
178 
179 	/* Vertical control register. */
180 	u_long vl_vsync_len;	/* Length of vertical sync */
181 	u_long vl_upper_margin;	/* Time from sync to picture */
182 	u_long vl_lower_margin;	/* Time from picture to sync */
183 
184 	u_long	mmio;		/* Memory mapped registers */
185 } vidinfo_t;
186 
187 #elif defined(CONFIG_EXYNOS_FB)
188 
189 enum {
190 	FIMD_RGB_INTERFACE = 1,
191 	FIMD_CPU_INTERFACE = 2,
192 };
193 
194 typedef struct vidinfo {
195 	ushort vl_col;		/* Number of columns (i.e. 640) */
196 	ushort vl_row;		/* Number of rows (i.e. 480) */
197 	ushort vl_width;	/* Width of display area in millimeters */
198 	ushort vl_height;	/* Height of display area in millimeters */
199 
200 	/* LCD configuration register */
201 	u_char vl_freq;		/* Frequency */
202 	u_char vl_clkp;		/* Clock polarity */
203 	u_char vl_oep;		/* Output Enable polarity */
204 	u_char vl_hsp;		/* Horizontal Sync polarity */
205 	u_char vl_vsp;		/* Vertical Sync polarity */
206 	u_char vl_dp;		/* Data polarity */
207 	u_char vl_bpix;		/* Bits per pixel */
208 
209 	/* Horizontal control register. Timing from data sheet */
210 	u_char vl_hspw;		/* Horz sync pulse width */
211 	u_char vl_hfpd;		/* Wait before of line */
212 	u_char vl_hbpd;		/* Wait end of line */
213 
214 	/* Vertical control register. */
215 	u_char	vl_vspw;	/* Vertical sync pulse width */
216 	u_char	vl_vfpd;	/* Wait before of frame */
217 	u_char	vl_vbpd;	/* Wait end of frame */
218 	u_char  vl_cmd_allow_len; /* Wait end of frame */
219 
220 	void (*cfg_gpio)(void);
221 	void (*backlight_on)(unsigned int onoff);
222 	void (*reset_lcd)(void);
223 	void (*lcd_power_on)(void);
224 	void (*cfg_ldo)(void);
225 	void (*enable_ldo)(unsigned int onoff);
226 	void (*mipi_power)(void);
227 	void (*backlight_reset)(void);
228 
229 	unsigned int win_id;
230 	unsigned int init_delay;
231 	unsigned int power_on_delay;
232 	unsigned int reset_delay;
233 	unsigned int interface_mode;
234 	unsigned int mipi_enabled;
235 	unsigned int cs_setup;
236 	unsigned int wr_setup;
237 	unsigned int wr_act;
238 	unsigned int wr_hold;
239 
240 	/* parent clock name(MPLL, EPLL or VPLL) */
241 	unsigned int pclk_name;
242 	/* ratio value for source clock from parent clock. */
243 	unsigned int sclk_div;
244 
245 	unsigned int dual_lcd_enabled;
246 
247 } vidinfo_t;
248 
249 void init_panel_info(vidinfo_t *vid);
250 
251 #else
252 
253 typedef struct vidinfo {
254 	ushort	vl_col;		/* Number of columns (i.e. 160) */
255 	ushort	vl_row;		/* Number of rows (i.e. 100) */
256 
257 	u_char	vl_bpix;	/* Bits per pixel, 0 = 1 */
258 
259 	ushort	*cmap;		/* Pointer to the colormap */
260 
261 	void	*priv;		/* Pointer to driver-specific data */
262 } vidinfo_t;
263 
264 #endif /* CONFIG_MPC823, CONFIG_CPU_PXA25X, CONFIG_MCC200, CONFIG_ATMEL_LCD */
265 
266 extern vidinfo_t panel_info;
267 
268 /* Video functions */
269 
270 #if defined(CONFIG_RBC823)
271 void	lcd_disable	(void);
272 #endif
273 
274 
275 /* int	lcd_init	(void *lcdbase); */
276 void	lcd_putc	(const char c);
277 void	lcd_puts	(const char *s);
278 void	lcd_printf	(const char *fmt, ...);
279 void	lcd_clear(void);
280 int	lcd_display_bitmap(ulong bmp_image, int x, int y);
281 
282 /* Allow boards to customize the information displayed */
283 void lcd_show_board_info(void);
284 
285 /************************************************************************/
286 /* ** BITMAP DISPLAY SUPPORT						*/
287 /************************************************************************/
288 #if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
289 # include <bmp_layout.h>
290 # include <asm/byteorder.h>
291 #endif
292 
293 /*
294  *  Information about displays we are using. This is for configuring
295  *  the LCD controller and memory allocation. Someone has to know what
296  *  is connected, as we can't autodetect anything.
297  */
298 #define CONFIG_SYS_HIGH	0	/* Pins are active high			*/
299 #define CONFIG_SYS_LOW		1	/* Pins are active low			*/
300 
301 #define LCD_MONOCHROME	0
302 #define LCD_COLOR2	1
303 #define LCD_COLOR4	2
304 #define LCD_COLOR8	3
305 #define LCD_COLOR16	4
306 
307 /*----------------------------------------------------------------------*/
308 #if defined(CONFIG_LCD_INFO_BELOW_LOGO)
309 # define LCD_INFO_X		0
310 # define LCD_INFO_Y		(BMP_LOGO_HEIGHT + VIDEO_FONT_HEIGHT)
311 #elif defined(CONFIG_LCD_LOGO)
312 # define LCD_INFO_X		(BMP_LOGO_WIDTH + 4 * VIDEO_FONT_WIDTH)
313 # define LCD_INFO_Y		(VIDEO_FONT_HEIGHT)
314 #else
315 # define LCD_INFO_X		(VIDEO_FONT_WIDTH)
316 # define LCD_INFO_Y		(VIDEO_FONT_HEIGHT)
317 #endif
318 
319 /* Default to 8bpp if bit depth not specified */
320 #ifndef LCD_BPP
321 # define LCD_BPP			LCD_COLOR8
322 #endif
323 #ifndef LCD_DF
324 # define LCD_DF			1
325 #endif
326 
327 /* Calculate nr. of bits per pixel  and nr. of colors */
328 #define NBITS(bit_code)		(1 << (bit_code))
329 #define NCOLORS(bit_code)	(1 << NBITS(bit_code))
330 
331 /************************************************************************/
332 /* ** CONSOLE CONSTANTS							*/
333 /************************************************************************/
334 #if LCD_BPP == LCD_MONOCHROME
335 
336 /*
337  * Simple black/white definitions
338  */
339 # define CONSOLE_COLOR_BLACK	0
340 # define CONSOLE_COLOR_WHITE	1	/* Must remain last / highest	*/
341 
342 #elif LCD_BPP == LCD_COLOR8
343 
344 /*
345  * 8bpp color definitions
346  */
347 # define CONSOLE_COLOR_BLACK	0
348 # define CONSOLE_COLOR_RED	1
349 # define CONSOLE_COLOR_GREEN	2
350 # define CONSOLE_COLOR_YELLOW	3
351 # define CONSOLE_COLOR_BLUE	4
352 # define CONSOLE_COLOR_MAGENTA	5
353 # define CONSOLE_COLOR_CYAN	6
354 # define CONSOLE_COLOR_GREY	14
355 # define CONSOLE_COLOR_WHITE	15	/* Must remain last / highest	*/
356 
357 #else
358 
359 /*
360  * 16bpp color definitions
361  */
362 # define CONSOLE_COLOR_BLACK	0x0000
363 # define CONSOLE_COLOR_WHITE	0xffff	/* Must remain last / highest	*/
364 
365 #endif /* color definitions */
366 
367 /************************************************************************/
368 #ifndef PAGE_SIZE
369 # define PAGE_SIZE	4096
370 #endif
371 
372 /************************************************************************/
373 /* ** CONSOLE DEFINITIONS & FUNCTIONS					*/
374 /************************************************************************/
375 #if defined(CONFIG_LCD_LOGO) && !defined(CONFIG_LCD_INFO_BELOW_LOGO)
376 # define CONSOLE_ROWS		((panel_info.vl_row-BMP_LOGO_HEIGHT) \
377 					/ VIDEO_FONT_HEIGHT)
378 #else
379 # define CONSOLE_ROWS		(panel_info.vl_row / VIDEO_FONT_HEIGHT)
380 #endif
381 
382 #define CONSOLE_COLS		(panel_info.vl_col / VIDEO_FONT_WIDTH)
383 #define CONSOLE_ROW_SIZE	(VIDEO_FONT_HEIGHT * lcd_line_length)
384 #define CONSOLE_ROW_FIRST	(lcd_console_address)
385 #define CONSOLE_ROW_SECOND	(lcd_console_address + CONSOLE_ROW_SIZE)
386 #define CONSOLE_ROW_LAST	(lcd_console_address + CONSOLE_SIZE \
387 					- CONSOLE_ROW_SIZE)
388 #define CONSOLE_SIZE		(CONSOLE_ROW_SIZE * CONSOLE_ROWS)
389 #define CONSOLE_SCROLL_SIZE	(CONSOLE_SIZE - CONSOLE_ROW_SIZE)
390 
391 #if LCD_BPP == LCD_MONOCHROME
392 # define COLOR_MASK(c)		((c)	  | (c) << 1 | (c) << 2 | (c) << 3 | \
393 				 (c) << 4 | (c) << 5 | (c) << 6 | (c) << 7)
394 #elif (LCD_BPP == LCD_COLOR8) || (LCD_BPP == LCD_COLOR16)
395 # define COLOR_MASK(c)		(c)
396 #else
397 # error Unsupported LCD BPP.
398 #endif
399 
400 /************************************************************************/
401 
402 #endif	/* _LCD_H_ */
403