xref: /rk3399_rockchip-uboot/include/lcd.h (revision cdfcedbf250ba2ec01b2555cffde83e9947e9fbf)
1fe8c2806Swdenk /*
28655b6f8Swdenk  * MPC823 and PXA LCD Controller
3fe8c2806Swdenk  *
4fe8c2806Swdenk  * Modeled after video interface by Paolo Scaffardi
5fe8c2806Swdenk  *
6fe8c2806Swdenk  *
7fe8c2806Swdenk  * (C) Copyright 2001
8fe8c2806Swdenk  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9fe8c2806Swdenk  *
10fe8c2806Swdenk  * See file CREDITS for list of people who contributed to this
11fe8c2806Swdenk  * project.
12fe8c2806Swdenk  *
13fe8c2806Swdenk  * This program is free software; you can redistribute it and/or
14fe8c2806Swdenk  * modify it under the terms of the GNU General Public License as
15fe8c2806Swdenk  * published by the Free Software Foundation; either version 2 of
16fe8c2806Swdenk  * the License, or (at your option) any later version.
17fe8c2806Swdenk  *
18fe8c2806Swdenk  * This program is distributed in the hope that it will be useful,
19fe8c2806Swdenk  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20fe8c2806Swdenk  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
21fe8c2806Swdenk  * GNU General Public License for more details.
22fe8c2806Swdenk  *
23fe8c2806Swdenk  * You should have received a copy of the GNU General Public License
24fe8c2806Swdenk  * along with this program; if not, write to the Free Software
25fe8c2806Swdenk  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26fe8c2806Swdenk  * MA 02111-1307 USA
27fe8c2806Swdenk  */
28fe8c2806Swdenk 
29fe8c2806Swdenk #ifndef _LCD_H_
30fe8c2806Swdenk #define _LCD_H_
31fe8c2806Swdenk 
328655b6f8Swdenk extern char lcd_is_enabled;
338655b6f8Swdenk 
348655b6f8Swdenk extern int lcd_line_length;
358655b6f8Swdenk extern int lcd_color_fg;
368655b6f8Swdenk extern int lcd_color_bg;
378655b6f8Swdenk 
388655b6f8Swdenk /*
398655b6f8Swdenk  * Frame buffer memory information
408655b6f8Swdenk  */
418655b6f8Swdenk extern void *lcd_base;		/* Start of framebuffer memory	*/
428655b6f8Swdenk extern void *lcd_console_address;	/* Start of console buffer	*/
438655b6f8Swdenk 
448655b6f8Swdenk extern short console_col;
458655b6f8Swdenk extern short console_row;
466111722aSAlessandro Rubini extern struct vidinfo panel_info;
476111722aSAlessandro Rubini 
486111722aSAlessandro Rubini extern void lcd_ctrl_init (void *lcdbase);
496111722aSAlessandro Rubini extern void lcd_enable (void);
506111722aSAlessandro Rubini 
516111722aSAlessandro Rubini /* setcolreg used in 8bpp/16bpp; initcolregs used in monochrome */
526111722aSAlessandro Rubini extern void lcd_setcolreg (ushort regno,
536111722aSAlessandro Rubini 				ushort red, ushort green, ushort blue);
546111722aSAlessandro Rubini extern void lcd_initcolregs (void);
556111722aSAlessandro Rubini 
566111722aSAlessandro Rubini /* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */
576111722aSAlessandro Rubini extern struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp);
588655b6f8Swdenk 
598655b6f8Swdenk #if defined CONFIG_MPC823
608655b6f8Swdenk /*
618655b6f8Swdenk  * LCD controller stucture for MPC823 CPU
628655b6f8Swdenk  */
638655b6f8Swdenk typedef struct vidinfo {
648655b6f8Swdenk 	ushort	vl_col;		/* Number of columns (i.e. 640) */
658655b6f8Swdenk 	ushort	vl_row;		/* Number of rows (i.e. 480) */
668655b6f8Swdenk 	ushort	vl_width;	/* Width of display area in millimeters */
678655b6f8Swdenk 	ushort	vl_height;	/* Height of display area in millimeters */
688655b6f8Swdenk 
698655b6f8Swdenk 	/* LCD configuration register */
708655b6f8Swdenk 	u_char	vl_clkp;	/* Clock polarity */
718655b6f8Swdenk 	u_char	vl_oep;		/* Output Enable polarity */
728655b6f8Swdenk 	u_char	vl_hsp;		/* Horizontal Sync polarity */
738655b6f8Swdenk 	u_char	vl_vsp;		/* Vertical Sync polarity */
748655b6f8Swdenk 	u_char	vl_dp;		/* Data polarity */
758655b6f8Swdenk 	u_char	vl_bpix;	/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8 */
768655b6f8Swdenk 	u_char	vl_lbw;		/* LCD Bus width, 0 = 4, 1 = 8 */
778655b6f8Swdenk 	u_char	vl_splt;	/* Split display, 0 = single-scan, 1 = dual-scan */
788655b6f8Swdenk 	u_char	vl_clor;	/* Color, 0 = mono, 1 = color */
798655b6f8Swdenk 	u_char	vl_tft;		/* 0 = passive, 1 = TFT */
808655b6f8Swdenk 
818655b6f8Swdenk 	/* Horizontal control register. Timing from data sheet */
828655b6f8Swdenk 	ushort	vl_wbl;		/* Wait between lines */
838655b6f8Swdenk 
848655b6f8Swdenk 	/* Vertical control register */
858655b6f8Swdenk 	u_char	vl_vpw;		/* Vertical sync pulse width */
868655b6f8Swdenk 	u_char	vl_lcdac;	/* LCD AC timing */
878655b6f8Swdenk 	u_char	vl_wbf;		/* Wait between frames */
888655b6f8Swdenk } vidinfo_t;
898655b6f8Swdenk 
908c35d0c5SMarek Vasut #elif defined CONFIG_PXA250 || defined CONFIG_PXA27X || defined CONFIG_CPU_MONAHANS
918655b6f8Swdenk /*
928655b6f8Swdenk  * PXA LCD DMA descriptor
938655b6f8Swdenk  */
948655b6f8Swdenk struct pxafb_dma_descriptor {
958655b6f8Swdenk 	u_long	fdadr;		/* Frame descriptor address register */
968655b6f8Swdenk 	u_long	fsadr;		/* Frame source address register */
978655b6f8Swdenk 	u_long	fidr;		/* Frame ID register */
988655b6f8Swdenk 	u_long	ldcmd;		/* Command register */
998655b6f8Swdenk };
1008655b6f8Swdenk 
1018655b6f8Swdenk /*
1028655b6f8Swdenk  * PXA LCD info
1038655b6f8Swdenk  */
1048655b6f8Swdenk struct pxafb_info {
1058655b6f8Swdenk 
1068655b6f8Swdenk 	/* Misc registers */
1078655b6f8Swdenk 	u_long	reg_lccr3;
1088655b6f8Swdenk 	u_long	reg_lccr2;
1098655b6f8Swdenk 	u_long	reg_lccr1;
1108655b6f8Swdenk 	u_long	reg_lccr0;
1118655b6f8Swdenk 	u_long	fdadr0;
1128655b6f8Swdenk 	u_long	fdadr1;
1138655b6f8Swdenk 
1148655b6f8Swdenk 	/* DMA descriptors */
1158655b6f8Swdenk 	struct	pxafb_dma_descriptor *	dmadesc_fblow;
1168655b6f8Swdenk 	struct	pxafb_dma_descriptor *	dmadesc_fbhigh;
1178655b6f8Swdenk 	struct	pxafb_dma_descriptor *	dmadesc_palette;
1188655b6f8Swdenk 
1198655b6f8Swdenk 	u_long	screen;		/* physical address of frame buffer */
1208655b6f8Swdenk 	u_long	palette;	/* physical address of palette memory */
1218655b6f8Swdenk 	u_int	palette_size;
1228655b6f8Swdenk };
1238655b6f8Swdenk 
1248655b6f8Swdenk /*
1258655b6f8Swdenk  * LCD controller stucture for PXA CPU
1268655b6f8Swdenk  */
1278655b6f8Swdenk typedef struct vidinfo {
1288655b6f8Swdenk 	ushort	vl_col;		/* Number of columns (i.e. 640) */
1298655b6f8Swdenk 	ushort	vl_row;		/* Number of rows (i.e. 480) */
1308655b6f8Swdenk 	ushort	vl_width;	/* Width of display area in millimeters */
1318655b6f8Swdenk 	ushort	vl_height;	/* Height of display area in millimeters */
1328655b6f8Swdenk 
1338655b6f8Swdenk 	/* LCD configuration register */
1348655b6f8Swdenk 	u_char	vl_clkp;	/* Clock polarity */
1358655b6f8Swdenk 	u_char	vl_oep;		/* Output Enable polarity */
1368655b6f8Swdenk 	u_char	vl_hsp;		/* Horizontal Sync polarity */
1378655b6f8Swdenk 	u_char	vl_vsp;		/* Vertical Sync polarity */
1388655b6f8Swdenk 	u_char	vl_dp;		/* Data polarity */
1398655b6f8Swdenk 	u_char	vl_bpix;	/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
1408655b6f8Swdenk 	u_char	vl_lbw;		/* LCD Bus width, 0 = 4, 1 = 8 */
1418655b6f8Swdenk 	u_char	vl_splt;	/* Split display, 0 = single-scan, 1 = dual-scan */
1428655b6f8Swdenk 	u_char	vl_clor;	/* Color, 0 = mono, 1 = color */
1438655b6f8Swdenk 	u_char	vl_tft;		/* 0 = passive, 1 = TFT */
1448655b6f8Swdenk 
1458655b6f8Swdenk 	/* Horizontal control register. Timing from data sheet */
1468655b6f8Swdenk 	ushort	vl_hpw;		/* Horz sync pulse width */
1478655b6f8Swdenk 	u_char	vl_blw;		/* Wait before of line */
1488655b6f8Swdenk 	u_char	vl_elw;		/* Wait end of line */
1498655b6f8Swdenk 
1508655b6f8Swdenk 	/* Vertical control register. */
1518655b6f8Swdenk 	u_char	vl_vpw;		/* Vertical sync pulse width */
1528655b6f8Swdenk 	u_char	vl_bfw;		/* Wait before of frame */
1538655b6f8Swdenk 	u_char	vl_efw;		/* Wait end of frame */
1548655b6f8Swdenk 
1558655b6f8Swdenk 	/* PXA LCD controller params */
1568655b6f8Swdenk 	struct	pxafb_info pxa;
1578655b6f8Swdenk } vidinfo_t;
1588655b6f8Swdenk 
15939cf4804SStelian Pop #elif defined(CONFIG_ATMEL_LCD)
16039cf4804SStelian Pop 
16139cf4804SStelian Pop typedef struct vidinfo {
16239cf4804SStelian Pop 	u_long vl_col;		/* Number of columns (i.e. 640) */
16339cf4804SStelian Pop 	u_long vl_row;		/* Number of rows (i.e. 480) */
16439cf4804SStelian Pop 	u_long vl_clk;	/* pixel clock in ps    */
16539cf4804SStelian Pop 
16639cf4804SStelian Pop 	/* LCD configuration register */
16739cf4804SStelian Pop 	u_long vl_sync;		/* Horizontal / vertical sync */
16839cf4804SStelian Pop 	u_long vl_bpix;		/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
16939cf4804SStelian Pop 	u_long vl_tft;		/* 0 = passive, 1 = TFT */
170*cdfcedbfSAlexander Stein 	u_long vl_cont_pol_low;	/* contrast polarity is low */
17139cf4804SStelian Pop 
17239cf4804SStelian Pop 	/* Horizontal control register. */
17339cf4804SStelian Pop 	u_long vl_hsync_len;	/* Length of horizontal sync */
17439cf4804SStelian Pop 	u_long vl_left_margin;	/* Time from sync to picture */
17539cf4804SStelian Pop 	u_long vl_right_margin;	/* Time from picture to sync */
17639cf4804SStelian Pop 
17739cf4804SStelian Pop 	/* Vertical control register. */
17839cf4804SStelian Pop 	u_long vl_vsync_len;	/* Length of vertical sync */
17939cf4804SStelian Pop 	u_long vl_upper_margin;	/* Time from sync to picture */
18039cf4804SStelian Pop 	u_long vl_lower_margin;	/* Time from picture to sync */
18139cf4804SStelian Pop 
18239cf4804SStelian Pop 	u_long	mmio;		/* Memory mapped registers */
18339cf4804SStelian Pop } vidinfo_t;
18439cf4804SStelian Pop 
185b245e65eSGuennadi Liakhovetski #else
186b245e65eSGuennadi Liakhovetski 
187b245e65eSGuennadi Liakhovetski typedef struct vidinfo {
188b245e65eSGuennadi Liakhovetski 	ushort	vl_col;		/* Number of columns (i.e. 160) */
189b245e65eSGuennadi Liakhovetski 	ushort	vl_row;		/* Number of rows (i.e. 100) */
190b245e65eSGuennadi Liakhovetski 
191b245e65eSGuennadi Liakhovetski 	u_char	vl_bpix;	/* Bits per pixel, 0 = 1 */
192b245e65eSGuennadi Liakhovetski 
193b245e65eSGuennadi Liakhovetski 	ushort	*cmap;		/* Pointer to the colormap */
194b245e65eSGuennadi Liakhovetski 
195b245e65eSGuennadi Liakhovetski 	void	*priv;		/* Pointer to driver-specific data */
196b245e65eSGuennadi Liakhovetski } vidinfo_t;
197b245e65eSGuennadi Liakhovetski 
19839cf4804SStelian Pop #endif /* CONFIG_MPC823, CONFIG_PXA250 or CONFIG_MCC200 or CONFIG_ATMEL_LCD */
1998655b6f8Swdenk 
20060e97419SAlessandro Rubini extern vidinfo_t panel_info;
20160e97419SAlessandro Rubini 
2028655b6f8Swdenk /* Video functions */
2038655b6f8Swdenk 
204682011ffSwdenk #if defined(CONFIG_RBC823)
205682011ffSwdenk void	lcd_disable	(void);
206682011ffSwdenk #endif
207682011ffSwdenk 
208fe8c2806Swdenk 
209c3f4d17eSwdenk /* int	lcd_init	(void *lcdbase); */
210fe8c2806Swdenk void	lcd_putc	(const char c);
211fe8c2806Swdenk void	lcd_puts	(const char *s);
212fe8c2806Swdenk void	lcd_printf	(const char *fmt, ...);
213fe8c2806Swdenk 
2146b59e03eSHaavard Skinnemoen /* Allow boards to customize the information displayed */
2156b59e03eSHaavard Skinnemoen void lcd_show_board_info(void);
2168655b6f8Swdenk 
2178655b6f8Swdenk /************************************************************************/
2188655b6f8Swdenk /* ** BITMAP DISPLAY SUPPORT						*/
2198655b6f8Swdenk /************************************************************************/
220639221c7SJon Loeliger #if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
2218655b6f8Swdenk # include <bmp_layout.h>
2228655b6f8Swdenk # include <asm/byteorder.h>
223639221c7SJon Loeliger #endif
2248655b6f8Swdenk 
2258655b6f8Swdenk /*
2268655b6f8Swdenk  *  Information about displays we are using. This is for configuring
2278655b6f8Swdenk  *  the LCD controller and memory allocation. Someone has to know what
2288655b6f8Swdenk  *  is connected, as we can't autodetect anything.
2298655b6f8Swdenk  */
2306d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HIGH	0	/* Pins are active high			*/
2316d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOW		1	/* Pins are active low			*/
2328655b6f8Swdenk 
2338655b6f8Swdenk #define LCD_MONOCHROME	0
2348655b6f8Swdenk #define LCD_COLOR2	1
2358655b6f8Swdenk #define LCD_COLOR4	2
2368655b6f8Swdenk #define LCD_COLOR8	3
2378655b6f8Swdenk #define LCD_COLOR16	4
2388655b6f8Swdenk 
2398655b6f8Swdenk /*----------------------------------------------------------------------*/
24088804d19Swdenk #if defined(CONFIG_LCD_INFO_BELOW_LOGO)
2418655b6f8Swdenk # define LCD_INFO_X		0
2428655b6f8Swdenk # define LCD_INFO_Y		(BMP_LOGO_HEIGHT + VIDEO_FONT_HEIGHT)
2438655b6f8Swdenk #elif defined(CONFIG_LCD_LOGO)
2448655b6f8Swdenk # define LCD_INFO_X		(BMP_LOGO_WIDTH + 4 * VIDEO_FONT_WIDTH)
2458655b6f8Swdenk # define LCD_INFO_Y		(VIDEO_FONT_HEIGHT)
2468655b6f8Swdenk #else
2478655b6f8Swdenk # define LCD_INFO_X		(VIDEO_FONT_WIDTH)
2488655b6f8Swdenk # define LCD_INFO_Y		(VIDEO_FONT_HEIGHT)
2498655b6f8Swdenk #endif
2508655b6f8Swdenk 
2518655b6f8Swdenk /* Default to 8bpp if bit depth not specified */
2528655b6f8Swdenk #ifndef LCD_BPP
2538655b6f8Swdenk # define LCD_BPP			LCD_COLOR8
2548655b6f8Swdenk #endif
2558655b6f8Swdenk #ifndef LCD_DF
2568655b6f8Swdenk # define LCD_DF			1
2578655b6f8Swdenk #endif
2588655b6f8Swdenk 
2598655b6f8Swdenk /* Calculate nr. of bits per pixel  and nr. of colors */
2608655b6f8Swdenk #define NBITS(bit_code)		(1 << (bit_code))
2618655b6f8Swdenk #define NCOLORS(bit_code)	(1 << NBITS(bit_code))
2628655b6f8Swdenk 
2638655b6f8Swdenk /************************************************************************/
2648655b6f8Swdenk /* ** CONSOLE CONSTANTS							*/
2658655b6f8Swdenk /************************************************************************/
2668655b6f8Swdenk #if LCD_BPP == LCD_MONOCHROME
2678655b6f8Swdenk 
2688655b6f8Swdenk /*
2698655b6f8Swdenk  * Simple black/white definitions
2708655b6f8Swdenk  */
2718655b6f8Swdenk # define CONSOLE_COLOR_BLACK	0
2728655b6f8Swdenk # define CONSOLE_COLOR_WHITE	1	/* Must remain last / highest	*/
2738655b6f8Swdenk 
2748655b6f8Swdenk #elif LCD_BPP == LCD_COLOR8
2758655b6f8Swdenk 
2768655b6f8Swdenk /*
2778655b6f8Swdenk  * 8bpp color definitions
2788655b6f8Swdenk  */
2798655b6f8Swdenk # define CONSOLE_COLOR_BLACK	0
2808655b6f8Swdenk # define CONSOLE_COLOR_RED	1
2818655b6f8Swdenk # define CONSOLE_COLOR_GREEN	2
2828655b6f8Swdenk # define CONSOLE_COLOR_YELLOW	3
2838655b6f8Swdenk # define CONSOLE_COLOR_BLUE	4
2848655b6f8Swdenk # define CONSOLE_COLOR_MAGENTA	5
2858655b6f8Swdenk # define CONSOLE_COLOR_CYAN	6
2868655b6f8Swdenk # define CONSOLE_COLOR_GREY	14
2878655b6f8Swdenk # define CONSOLE_COLOR_WHITE	15	/* Must remain last / highest	*/
2888655b6f8Swdenk 
2898655b6f8Swdenk #else
2908655b6f8Swdenk 
2918655b6f8Swdenk /*
2928655b6f8Swdenk  * 16bpp color definitions
2938655b6f8Swdenk  */
2948655b6f8Swdenk # define CONSOLE_COLOR_BLACK	0x0000
2958655b6f8Swdenk # define CONSOLE_COLOR_WHITE	0xffff	/* Must remain last / highest	*/
2968655b6f8Swdenk 
2978655b6f8Swdenk #endif /* color definitions */
2988655b6f8Swdenk 
2998655b6f8Swdenk /************************************************************************/
3008655b6f8Swdenk #ifndef PAGE_SIZE
3018655b6f8Swdenk # define PAGE_SIZE	4096
3028655b6f8Swdenk #endif
3038655b6f8Swdenk 
3048655b6f8Swdenk /************************************************************************/
3058655b6f8Swdenk /* ** CONSOLE DEFINITIONS & FUNCTIONS					*/
3068655b6f8Swdenk /************************************************************************/
30788804d19Swdenk #if defined(CONFIG_LCD_LOGO) && !defined(CONFIG_LCD_INFO_BELOW_LOGO)
3088655b6f8Swdenk # define CONSOLE_ROWS		((panel_info.vl_row-BMP_LOGO_HEIGHT) \
3098655b6f8Swdenk 					/ VIDEO_FONT_HEIGHT)
3108655b6f8Swdenk #else
3118655b6f8Swdenk # define CONSOLE_ROWS		(panel_info.vl_row / VIDEO_FONT_HEIGHT)
3128655b6f8Swdenk #endif
3138655b6f8Swdenk 
3148655b6f8Swdenk #define CONSOLE_COLS		(panel_info.vl_col / VIDEO_FONT_WIDTH)
3158655b6f8Swdenk #define CONSOLE_ROW_SIZE	(VIDEO_FONT_HEIGHT * lcd_line_length)
3168655b6f8Swdenk #define CONSOLE_ROW_FIRST	(lcd_console_address)
3178655b6f8Swdenk #define CONSOLE_ROW_SECOND	(lcd_console_address + CONSOLE_ROW_SIZE)
3188655b6f8Swdenk #define CONSOLE_ROW_LAST	(lcd_console_address + CONSOLE_SIZE \
3198655b6f8Swdenk 					- CONSOLE_ROW_SIZE)
3208655b6f8Swdenk #define CONSOLE_SIZE		(CONSOLE_ROW_SIZE * CONSOLE_ROWS)
3218655b6f8Swdenk #define CONSOLE_SCROLL_SIZE	(CONSOLE_SIZE - CONSOLE_ROW_SIZE)
3228655b6f8Swdenk 
3238655b6f8Swdenk #if LCD_BPP == LCD_MONOCHROME
3248655b6f8Swdenk # define COLOR_MASK(c)		((c)	  | (c) << 1 | (c) << 2 | (c) << 3 | \
3258655b6f8Swdenk 				 (c) << 4 | (c) << 5 | (c) << 6 | (c) << 7)
32669f32e6cSMark Jackson #elif (LCD_BPP == LCD_COLOR8) || (LCD_BPP == LCD_COLOR16)
3278655b6f8Swdenk # define COLOR_MASK(c)		(c)
3288655b6f8Swdenk #else
3298655b6f8Swdenk # error Unsupported LCD BPP.
3308655b6f8Swdenk #endif
3318655b6f8Swdenk 
3328655b6f8Swdenk /************************************************************************/
3338655b6f8Swdenk 
3348655b6f8Swdenk #endif	/* _LCD_H_ */
335