1 /* 2 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net> 3 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de> 4 * Changes for multibus/multiadapter I2C support. 5 * 6 * (C) Copyright 2001 7 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 * 11 * The original I2C interface was 12 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it) 13 * AIRVENT SAM s.p.a - RIMINI(ITALY) 14 * but has been changed substantially. 15 */ 16 17 #ifndef _I2C_H_ 18 #define _I2C_H_ 19 20 /* 21 * For now there are essentially two parts to this file - driver model 22 * here at the top, and the older code below (with CONFIG_SYS_I2C being 23 * most recent). The plan is to migrate everything to driver model. 24 * The driver model structures and API are separate as they are different 25 * enough as to be incompatible for compilation purposes. 26 */ 27 28 enum dm_i2c_chip_flags { 29 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */ 30 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */ 31 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */ 32 }; 33 34 struct udevice; 35 /** 36 * struct dm_i2c_chip - information about an i2c chip 37 * 38 * An I2C chip is a device on the I2C bus. It sits at a particular address 39 * and normally supports 7-bit or 10-bit addressing. 40 * 41 * To obtain this structure, use dev_get_parent_platdata(dev) where dev is 42 * the chip to examine. 43 * 44 * @chip_addr: Chip address on bus 45 * @offset_len: Length of offset in bytes. A single byte offset can 46 * represent up to 256 bytes. A value larger than 1 may be 47 * needed for larger devices. 48 * @flags: Flags for this chip (dm_i2c_chip_flags) 49 * @emul: Emulator for this chip address (only used for emulation) 50 */ 51 struct dm_i2c_chip { 52 uint chip_addr; 53 uint offset_len; 54 uint flags; 55 #ifdef CONFIG_SANDBOX 56 struct udevice *emul; 57 bool test_mode; 58 #endif 59 }; 60 61 /** 62 * struct dm_i2c_bus- information about an i2c bus 63 * 64 * An I2C bus contains 0 or more chips on it, each at its own address. The 65 * bus can operate at different speeds (measured in Hz, typically 100KHz 66 * or 400KHz). 67 * 68 * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the 69 * I2C bus udevice. 70 * 71 * @speed_hz: Bus speed in hertz (typically 100000) 72 */ 73 struct dm_i2c_bus { 74 int speed_hz; 75 }; 76 77 /* 78 * Not all of these flags are implemented in the U-Boot API 79 */ 80 enum dm_i2c_msg_flags { 81 I2C_M_TEN = 0x0010, /* ten-bit chip address */ 82 I2C_M_RD = 0x0001, /* read data, from slave to master */ 83 I2C_M_STOP = 0x8000, /* send stop after this message */ 84 I2C_M_NOSTART = 0x4000, /* no start before this message */ 85 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */ 86 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */ 87 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */ 88 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */ 89 }; 90 91 /** 92 * struct i2c_msg - an I2C message 93 * 94 * @addr: Slave address 95 * @flags: Flags (see enum dm_i2c_msg_flags) 96 * @len: Length of buffer in bytes, may be 0 for a probe 97 * @buf: Buffer to send/receive, or NULL if no data 98 */ 99 struct i2c_msg { 100 uint addr; 101 uint flags; 102 uint len; 103 u8 *buf; 104 }; 105 106 /** 107 * struct i2c_msg_list - a list of I2C messages 108 * 109 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem 110 * appropriate in U-Boot. 111 * 112 * @msg: Pointer to i2c_msg array 113 * @nmsgs: Number of elements in the array 114 */ 115 struct i2c_msg_list { 116 struct i2c_msg *msgs; 117 uint nmsgs; 118 }; 119 120 /** 121 * dm_i2c_read() - read bytes from an I2C chip 122 * 123 * To obtain an I2C device (called a 'chip') given the I2C bus address you 124 * can use i2c_get_chip(). To obtain a bus by bus number use 125 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>). 126 * 127 * To set the address length of a devce use i2c_set_addr_len(). It 128 * defaults to 1. 129 * 130 * @dev: Chip to read from 131 * @offset: Offset within chip to start reading 132 * @buffer: Place to put data 133 * @len: Number of bytes to read 134 * 135 * @return 0 on success, -ve on failure 136 */ 137 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len); 138 139 /** 140 * dm_i2c_write() - write bytes to an I2C chip 141 * 142 * See notes for dm_i2c_read() above. 143 * 144 * @dev: Chip to write to 145 * @offset: Offset within chip to start writing 146 * @buffer: Buffer containing data to write 147 * @len: Number of bytes to write 148 * 149 * @return 0 on success, -ve on failure 150 */ 151 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer, 152 int len); 153 154 /** 155 * dm_i2c_probe() - probe a particular chip address 156 * 157 * This can be useful to check for the existence of a chip on the bus. 158 * It is typically implemented by writing the chip address to the bus 159 * and checking that the chip replies with an ACK. 160 * 161 * @bus: Bus to probe 162 * @chip_addr: 7-bit address to probe (10-bit and others are not supported) 163 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags) 164 * @devp: Returns the device found, or NULL if none 165 * @return 0 if a chip was found at that address, -ve if not 166 */ 167 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, 168 struct udevice **devp); 169 170 /** 171 * dm_i2c_reg_read() - Read a value from an I2C register 172 * 173 * This reads a single value from the given address in an I2C chip 174 * 175 * @dev: Device to use for transfer 176 * @addr: Address to read from 177 * @return value read, or -ve on error 178 */ 179 int dm_i2c_reg_read(struct udevice *dev, uint offset); 180 181 /** 182 * dm_i2c_reg_write() - Write a value to an I2C register 183 * 184 * This writes a single value to the given address in an I2C chip 185 * 186 * @dev: Device to use for transfer 187 * @addr: Address to write to 188 * @val: Value to write (normally a byte) 189 * @return 0 on success, -ve on error 190 */ 191 int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val); 192 193 /** 194 * dm_i2c_set_bus_speed() - set the speed of a bus 195 * 196 * @bus: Bus to adjust 197 * @speed: Requested speed in Hz 198 * @return 0 if OK, -EINVAL for invalid values 199 */ 200 int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed); 201 202 /** 203 * dm_i2c_get_bus_speed() - get the speed of a bus 204 * 205 * @bus: Bus to check 206 * @return speed of selected I2C bus in Hz, -ve on error 207 */ 208 int dm_i2c_get_bus_speed(struct udevice *bus); 209 210 /** 211 * i2c_set_chip_flags() - set flags for a chip 212 * 213 * Typically addresses are 7 bits, but for 10-bit addresses you should set 214 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing. 215 * 216 * @dev: Chip to adjust 217 * @flags: New flags 218 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error 219 */ 220 int i2c_set_chip_flags(struct udevice *dev, uint flags); 221 222 /** 223 * i2c_get_chip_flags() - get flags for a chip 224 * 225 * @dev: Chip to check 226 * @flagsp: Place to put flags 227 * @return 0 if OK, other -ve value on error 228 */ 229 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp); 230 231 /** 232 * i2c_set_offset_len() - set the offset length for a chip 233 * 234 * The offset used to access a chip may be up to 4 bytes long. Typically it 235 * is only 1 byte, which is enough for chips with 256 bytes of memory or 236 * registers. The default value is 1, but you can call this function to 237 * change it. 238 * 239 * @offset_len: New offset length value (typically 1 or 2) 240 */ 241 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len); 242 243 /** 244 * i2c_get_offset_len() - get the offset length for a chip 245 * 246 * @return: Current offset length value (typically 1 or 2) 247 */ 248 int i2c_get_chip_offset_len(struct udevice *dev); 249 250 /** 251 * i2c_deblock() - recover a bus that is in an unknown state 252 * 253 * See the deblock() method in 'struct dm_i2c_ops' for full information 254 * 255 * @bus: Bus to recover 256 * @return 0 if OK, -ve on error 257 */ 258 int i2c_deblock(struct udevice *bus); 259 260 #ifdef CONFIG_DM_I2C_COMPAT 261 /** 262 * i2c_probe() - Compatibility function for driver model 263 * 264 * Calls dm_i2c_probe() on the current bus 265 */ 266 int i2c_probe(uint8_t chip_addr); 267 268 /** 269 * i2c_read() - Compatibility function for driver model 270 * 271 * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset 272 * set to @addr. @alen must match the current setting for the device. 273 */ 274 int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer, 275 int len); 276 277 /** 278 * i2c_write() - Compatibility function for driver model 279 * 280 * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset 281 * set to @addr. @alen must match the current setting for the device. 282 */ 283 int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer, 284 int len); 285 286 /** 287 * i2c_get_bus_num_fdt() - Compatibility function for driver model 288 * 289 * @return the bus number associated with the given device tree node 290 */ 291 int i2c_get_bus_num_fdt(int node); 292 293 /** 294 * i2c_get_bus_num() - Compatibility function for driver model 295 * 296 * @return the 'current' bus number 297 */ 298 unsigned int i2c_get_bus_num(void); 299 300 /** 301 * i2c_set_bus_num() - Compatibility function for driver model 302 * 303 * Sets the 'current' bus 304 */ 305 int i2c_set_bus_num(unsigned int bus); 306 307 static inline void I2C_SET_BUS(unsigned int bus) 308 { 309 i2c_set_bus_num(bus); 310 } 311 312 static inline unsigned int I2C_GET_BUS(void) 313 { 314 return i2c_get_bus_num(); 315 } 316 317 /** 318 * i2c_init() - Compatibility function for driver model 319 * 320 * This function does nothing. 321 */ 322 void i2c_init(int speed, int slaveaddr); 323 324 /** 325 * board_i2c_init() - Compatibility function for driver model 326 * 327 * @param blob Device tree blbo 328 * @return the number of I2C bus 329 */ 330 void board_i2c_init(const void *blob); 331 332 /* 333 * Compatibility functions for driver model. 334 */ 335 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); 336 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); 337 338 #endif 339 340 /** 341 * struct dm_i2c_ops - driver operations for I2C uclass 342 * 343 * Drivers should support these operations unless otherwise noted. These 344 * operations are intended to be used by uclass code, not directly from 345 * other code. 346 */ 347 struct dm_i2c_ops { 348 /** 349 * xfer() - transfer a list of I2C messages 350 * 351 * @bus: Bus to read from 352 * @msg: List of messages to transfer 353 * @nmsgs: Number of messages in the list 354 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte, 355 * -ECOMM if the speed cannot be supported, -EPROTO if the chip 356 * flags cannot be supported, other -ve value on some other error 357 */ 358 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs); 359 360 /** 361 * probe_chip() - probe for the presense of a chip address 362 * 363 * This function is optional. If omitted, the uclass will send a zero 364 * length message instead. 365 * 366 * @bus: Bus to probe 367 * @chip_addr: Chip address to probe 368 * @chip_flags: Probe flags (enum dm_i2c_chip_flags) 369 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back 370 * to default probem other -ve value on error 371 */ 372 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags); 373 374 /** 375 * set_bus_speed() - set the speed of a bus (optional) 376 * 377 * The bus speed value will be updated by the uclass if this function 378 * does not return an error. This method is optional - if it is not 379 * provided then the driver can read the speed from 380 * dev_get_uclass_priv(bus)->speed_hz 381 * 382 * @bus: Bus to adjust 383 * @speed: Requested speed in Hz 384 * @return 0 if OK, -EINVAL for invalid values 385 */ 386 int (*set_bus_speed)(struct udevice *bus, unsigned int speed); 387 388 /** 389 * get_bus_speed() - get the speed of a bus (optional) 390 * 391 * Normally this can be provided by the uclass, but if you want your 392 * driver to check the bus speed by looking at the hardware, you can 393 * implement that here. This method is optional. This method would 394 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz. 395 * 396 * @bus: Bus to check 397 * @return speed of selected I2C bus in Hz, -ve on error 398 */ 399 int (*get_bus_speed)(struct udevice *bus); 400 401 /** 402 * set_flags() - set the flags for a chip (optional) 403 * 404 * This is generally implemented by the uclass, but drivers can 405 * check the value to ensure that unsupported options are not used. 406 * This method is optional. If provided, this method will always be 407 * called when the flags change. 408 * 409 * @dev: Chip to adjust 410 * @flags: New flags value 411 * @return 0 if OK, -EINVAL if value is unsupported 412 */ 413 int (*set_flags)(struct udevice *dev, uint flags); 414 415 /** 416 * deblock() - recover a bus that is in an unknown state 417 * 418 * I2C is a synchronous protocol and resets of the processor in the 419 * middle of an access can block the I2C Bus until a powerdown of 420 * the full unit is done. This is because slaves can be stuck 421 * waiting for addition bus transitions for a transaction that will 422 * never complete. Resetting the I2C master does not help. The only 423 * way is to force the bus through a series of transitions to make 424 * sure that all slaves are done with the transaction. This method 425 * performs this 'deblocking' if support by the driver. 426 * 427 * This method is optional. 428 */ 429 int (*deblock)(struct udevice *bus); 430 }; 431 432 #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops) 433 434 /** 435 * i2c_get_chip() - get a device to use to access a chip on a bus 436 * 437 * This returns the device for the given chip address. The device can then 438 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc. 439 * 440 * @bus: Bus to examine 441 * @chip_addr: Chip address for the new device 442 * @offset_len: Length of a register offset in bytes (normally 1) 443 * @devp: Returns pointer to new device if found or -ENODEV if not 444 * found 445 */ 446 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len, 447 struct udevice **devp); 448 449 /** 450 * i2c_get_chip() - get a device to use to access a chip on a bus number 451 * 452 * This returns the device for the given chip address on a particular bus 453 * number. 454 * 455 * @busnum: Bus number to examine 456 * @chip_addr: Chip address for the new device 457 * @offset_len: Length of a register offset in bytes (normally 1) 458 * @devp: Returns pointer to new device if found or -ENODEV if not 459 * found 460 */ 461 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len, 462 struct udevice **devp); 463 464 /** 465 * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data 466 * 467 * This decodes the chip address from a device tree node and puts it into 468 * its dm_i2c_chip structure. This should be called in your driver's 469 * ofdata_to_platdata() method. 470 * 471 * @blob: Device tree blob 472 * @node: Node offset to read from 473 * @spi: Place to put the decoded information 474 */ 475 int i2c_chip_ofdata_to_platdata(const void *blob, int node, 476 struct dm_i2c_chip *chip); 477 478 /** 479 * i2c_dump_msgs() - Dump a list of I2C messages 480 * 481 * This may be useful for debugging. 482 * 483 * @msg: Message list to dump 484 * @nmsgs: Number of messages 485 */ 486 void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs); 487 488 #ifndef CONFIG_DM_I2C 489 490 /* 491 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 492 * 493 * The implementation MUST NOT use static or global variables if the 494 * I2C routines are used to read SDRAM configuration information 495 * because this is done before the memories are initialized. Limited 496 * use of stack-based variables are OK (the initial stack size is 497 * limited). 498 * 499 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 500 */ 501 502 /* 503 * Configuration items. 504 */ 505 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */ 506 507 #if !defined(CONFIG_SYS_I2C_MAX_HOPS) 508 /* no muxes used bus = i2c adapters */ 509 #define CONFIG_SYS_I2C_DIRECT_BUS 1 510 #define CONFIG_SYS_I2C_MAX_HOPS 0 511 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c) 512 #else 513 /* we use i2c muxes */ 514 #undef CONFIG_SYS_I2C_DIRECT_BUS 515 #endif 516 517 /* define the I2C bus number for RTC and DTT if not already done */ 518 #if !defined(CONFIG_SYS_RTC_BUS_NUM) 519 #define CONFIG_SYS_RTC_BUS_NUM 0 520 #endif 521 #if !defined(CONFIG_SYS_DTT_BUS_NUM) 522 #define CONFIG_SYS_DTT_BUS_NUM 0 523 #endif 524 #if !defined(CONFIG_SYS_SPD_BUS_NUM) 525 #define CONFIG_SYS_SPD_BUS_NUM 0 526 #endif 527 528 struct i2c_adapter { 529 void (*init)(struct i2c_adapter *adap, int speed, 530 int slaveaddr); 531 int (*probe)(struct i2c_adapter *adap, uint8_t chip); 532 int (*read)(struct i2c_adapter *adap, uint8_t chip, 533 uint addr, int alen, uint8_t *buffer, 534 int len); 535 int (*write)(struct i2c_adapter *adap, uint8_t chip, 536 uint addr, int alen, uint8_t *buffer, 537 int len); 538 uint (*set_bus_speed)(struct i2c_adapter *adap, 539 uint speed); 540 int speed; 541 int waitdelay; 542 int slaveaddr; 543 int init_done; 544 int hwadapnr; 545 char *name; 546 }; 547 548 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 549 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \ 550 { \ 551 .init = _init, \ 552 .probe = _probe, \ 553 .read = _read, \ 554 .write = _write, \ 555 .set_bus_speed = _set_speed, \ 556 .speed = _speed, \ 557 .slaveaddr = _slaveaddr, \ 558 .init_done = 0, \ 559 .hwadapnr = _hwadapnr, \ 560 .name = #_name \ 561 }; 562 563 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \ 564 _set_speed, _speed, _slaveaddr, _hwadapnr) \ 565 ll_entry_declare(struct i2c_adapter, _name, i2c) = \ 566 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 567 _set_speed, _speed, _slaveaddr, _hwadapnr, _name); 568 569 struct i2c_adapter *i2c_get_adapter(int index); 570 571 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 572 struct i2c_mux { 573 int id; 574 char name[16]; 575 }; 576 577 struct i2c_next_hop { 578 struct i2c_mux mux; 579 uint8_t chip; 580 uint8_t channel; 581 }; 582 583 struct i2c_bus_hose { 584 int adapter; 585 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS]; 586 }; 587 #define I2C_NULL_HOP {{-1, ""}, 0, 0} 588 extern struct i2c_bus_hose i2c_bus[]; 589 590 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter 591 #else 592 #define I2C_ADAPTER(bus) bus 593 #endif 594 #define I2C_BUS gd->cur_i2c_bus 595 596 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus)) 597 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus) 598 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr) 599 600 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 601 #define I2C_MUX_PCA9540_ID 1 602 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"} 603 #define I2C_MUX_PCA9542_ID 2 604 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"} 605 #define I2C_MUX_PCA9544_ID 3 606 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"} 607 #define I2C_MUX_PCA9547_ID 4 608 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"} 609 #define I2C_MUX_PCA9548_ID 5 610 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"} 611 #endif 612 613 #ifndef I2C_SOFT_DECLARATIONS 614 # if defined(CONFIG_MPC8260) 615 # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT); 616 # elif defined(CONFIG_8xx) 617 # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; 618 619 # elif (defined(CONFIG_AT91RM9200) || \ 620 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ 621 defined(CONFIG_AT91SAM9263)) 622 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; 623 # else 624 # define I2C_SOFT_DECLARATIONS 625 # endif 626 #endif 627 628 #ifdef CONFIG_8xx 629 /* Set default value for the I2C bus speed on 8xx. In the 630 * future, we'll define these in all 8xx board config files. 631 */ 632 #ifndef CONFIG_SYS_I2C_SPEED 633 #define CONFIG_SYS_I2C_SPEED 50000 634 #endif 635 #endif 636 637 /* 638 * Many boards/controllers/drivers don't support an I2C slave interface so 639 * provide a default slave address for them for use in common code. A real 640 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does 641 * support a slave interface. 642 */ 643 #ifndef CONFIG_SYS_I2C_SLAVE 644 #define CONFIG_SYS_I2C_SLAVE 0xfe 645 #endif 646 647 /* 648 * Initialization, must be called once on start up, may be called 649 * repeatedly to change the speed and slave addresses. 650 */ 651 void i2c_init(int speed, int slaveaddr); 652 void i2c_init_board(void); 653 #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT 654 void i2c_board_late_init(void); 655 #endif 656 657 #ifdef CONFIG_SYS_I2C 658 /* 659 * i2c_get_bus_num: 660 * 661 * Returns index of currently active I2C bus. Zero-based. 662 */ 663 unsigned int i2c_get_bus_num(void); 664 665 /* 666 * i2c_set_bus_num: 667 * 668 * Change the active I2C bus. Subsequent read/write calls will 669 * go to this one. 670 * 671 * bus - bus index, zero based 672 * 673 * Returns: 0 on success, not 0 on failure 674 * 675 */ 676 int i2c_set_bus_num(unsigned int bus); 677 678 /* 679 * i2c_init_all(): 680 * 681 * Initializes all I2C adapters in the system. All i2c_adap structures must 682 * be initialized beforehead with function pointers and data, including 683 * speed and slaveaddr. Returns 0 on success, non-0 on failure. 684 */ 685 void i2c_init_all(void); 686 687 /* 688 * Probe the given I2C chip address. Returns 0 if a chip responded, 689 * not 0 on failure. 690 */ 691 int i2c_probe(uint8_t chip); 692 693 /* 694 * Read/Write interface: 695 * chip: I2C chip address, range 0..127 696 * addr: Memory (register) address within the chip 697 * alen: Number of bytes to use for addr (typically 1, 2 for larger 698 * memories, 0 for register type devices with only one 699 * register) 700 * buffer: Where to read/write the data 701 * len: How many bytes to read/write 702 * 703 * Returns: 0 on success, not 0 on failure 704 */ 705 int i2c_read(uint8_t chip, unsigned int addr, int alen, 706 uint8_t *buffer, int len); 707 708 int i2c_write(uint8_t chip, unsigned int addr, int alen, 709 uint8_t *buffer, int len); 710 711 /* 712 * Utility routines to read/write registers. 713 */ 714 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); 715 716 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); 717 718 /* 719 * i2c_set_bus_speed: 720 * 721 * Change the speed of the active I2C bus 722 * 723 * speed - bus speed in Hz 724 * 725 * Returns: new bus speed 726 * 727 */ 728 unsigned int i2c_set_bus_speed(unsigned int speed); 729 730 /* 731 * i2c_get_bus_speed: 732 * 733 * Returns speed of currently active I2C bus in Hz 734 */ 735 736 unsigned int i2c_get_bus_speed(void); 737 738 /* 739 * i2c_reloc_fixup: 740 * 741 * Adjusts I2C pointers after U-Boot is relocated to DRAM 742 */ 743 void i2c_reloc_fixup(void); 744 #if defined(CONFIG_SYS_I2C_SOFT) 745 void i2c_soft_init(void); 746 void i2c_soft_active(void); 747 void i2c_soft_tristate(void); 748 int i2c_soft_read(void); 749 void i2c_soft_sda(int bit); 750 void i2c_soft_scl(int bit); 751 void i2c_soft_delay(void); 752 #endif 753 #else 754 755 /* 756 * Probe the given I2C chip address. Returns 0 if a chip responded, 757 * not 0 on failure. 758 */ 759 int i2c_probe(uchar chip); 760 761 /* 762 * Read/Write interface: 763 * chip: I2C chip address, range 0..127 764 * addr: Memory (register) address within the chip 765 * alen: Number of bytes to use for addr (typically 1, 2 for larger 766 * memories, 0 for register type devices with only one 767 * register) 768 * buffer: Where to read/write the data 769 * len: How many bytes to read/write 770 * 771 * Returns: 0 on success, not 0 on failure 772 */ 773 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len); 774 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); 775 776 /* 777 * Utility routines to read/write registers. 778 */ 779 static inline u8 i2c_reg_read(u8 addr, u8 reg) 780 { 781 u8 buf; 782 783 #ifdef CONFIG_8xx 784 /* MPC8xx needs this. Maybe one day we can get rid of it. */ 785 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 786 #endif 787 788 #ifdef DEBUG 789 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg); 790 #endif 791 792 i2c_read(addr, reg, 1, &buf, 1); 793 794 return buf; 795 } 796 797 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val) 798 { 799 #ifdef CONFIG_8xx 800 /* MPC8xx needs this. Maybe one day we can get rid of it. */ 801 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 802 #endif 803 804 #ifdef DEBUG 805 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n", 806 __func__, addr, reg, val); 807 #endif 808 809 i2c_write(addr, reg, 1, &val, 1); 810 } 811 812 /* 813 * Functions for setting the current I2C bus and its speed 814 */ 815 816 /* 817 * i2c_set_bus_num: 818 * 819 * Change the active I2C bus. Subsequent read/write calls will 820 * go to this one. 821 * 822 * bus - bus index, zero based 823 * 824 * Returns: 0 on success, not 0 on failure 825 * 826 */ 827 int i2c_set_bus_num(unsigned int bus); 828 829 /* 830 * i2c_get_bus_num: 831 * 832 * Returns index of currently active I2C bus. Zero-based. 833 */ 834 835 unsigned int i2c_get_bus_num(void); 836 837 /* 838 * i2c_set_bus_speed: 839 * 840 * Change the speed of the active I2C bus 841 * 842 * speed - bus speed in Hz 843 * 844 * Returns: 0 on success, not 0 on failure 845 * 846 */ 847 int i2c_set_bus_speed(unsigned int); 848 849 /* 850 * i2c_get_bus_speed: 851 * 852 * Returns speed of currently active I2C bus in Hz 853 */ 854 855 unsigned int i2c_get_bus_speed(void); 856 #endif /* CONFIG_SYS_I2C */ 857 858 /* 859 * only for backwardcompatibility, should go away if we switched 860 * completely to new multibus support. 861 */ 862 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) 863 # if !defined(CONFIG_SYS_MAX_I2C_BUS) 864 # define CONFIG_SYS_MAX_I2C_BUS 2 865 # endif 866 # define I2C_MULTI_BUS 1 867 #else 868 # define CONFIG_SYS_MAX_I2C_BUS 1 869 # define I2C_MULTI_BUS 0 870 #endif 871 872 /* NOTE: These two functions MUST be always_inline to avoid code growth! */ 873 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline)); 874 static inline unsigned int I2C_GET_BUS(void) 875 { 876 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0; 877 } 878 879 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline)); 880 static inline void I2C_SET_BUS(unsigned int bus) 881 { 882 if (I2C_MULTI_BUS) 883 i2c_set_bus_num(bus); 884 } 885 886 /* Multi I2C definitions */ 887 enum { 888 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7, 889 I2C_8, I2C_9, I2C_10, 890 }; 891 892 /* Multi I2C busses handling */ 893 #ifdef CONFIG_SOFT_I2C_MULTI_BUS 894 extern int get_multi_scl_pin(void); 895 extern int get_multi_sda_pin(void); 896 extern int multi_i2c_init(void); 897 #endif 898 899 /** 900 * Get FDT values for i2c bus. 901 * 902 * @param blob Device tree blbo 903 * @return the number of I2C bus 904 */ 905 void board_i2c_init(const void *blob); 906 907 /** 908 * Find the I2C bus number by given a FDT I2C node. 909 * 910 * @param blob Device tree blbo 911 * @param node FDT I2C node to find 912 * @return the number of I2C bus (zero based), or -1 on error 913 */ 914 int i2c_get_bus_num_fdt(int node); 915 916 /** 917 * Reset the I2C bus represented by the given a FDT I2C node. 918 * 919 * @param blob Device tree blbo 920 * @param node FDT I2C node to find 921 * @return 0 if port was reset, -1 if not found 922 */ 923 int i2c_reset_port_fdt(const void *blob, int node); 924 925 #endif /* !CONFIG_DM_I2C */ 926 927 #endif /* _I2C_H_ */ 928