1 /* 2 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net> 3 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de> 4 * Changes for multibus/multiadapter I2C support. 5 * 6 * (C) Copyright 2001 7 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. 8 * 9 * See file CREDITS for list of people who contributed to this 10 * project. 11 * 12 * This program is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License as 14 * published by the Free Software Foundation; either version 2 of 15 * the License, or (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 25 * MA 02111-1307 USA 26 * 27 * The original I2C interface was 28 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it) 29 * AIRVENT SAM s.p.a - RIMINI(ITALY) 30 * but has been changed substantially. 31 */ 32 33 #ifndef _I2C_H_ 34 #define _I2C_H_ 35 36 /* 37 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 38 * 39 * The implementation MUST NOT use static or global variables if the 40 * I2C routines are used to read SDRAM configuration information 41 * because this is done before the memories are initialized. Limited 42 * use of stack-based variables are OK (the initial stack size is 43 * limited). 44 * 45 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 46 */ 47 48 /* 49 * Configuration items. 50 */ 51 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */ 52 53 #if !defined(CONFIG_SYS_I2C_MAX_HOPS) 54 /* no muxes used bus = i2c adapters */ 55 #define CONFIG_SYS_I2C_DIRECT_BUS 1 56 #define CONFIG_SYS_I2C_MAX_HOPS 0 57 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c) 58 #else 59 /* we use i2c muxes */ 60 #undef CONFIG_SYS_I2C_DIRECT_BUS 61 #endif 62 63 /* define the I2C bus number for RTC and DTT if not already done */ 64 #if !defined(CONFIG_SYS_RTC_BUS_NUM) 65 #define CONFIG_SYS_RTC_BUS_NUM 0 66 #endif 67 #if !defined(CONFIG_SYS_DTT_BUS_NUM) 68 #define CONFIG_SYS_DTT_BUS_NUM 0 69 #endif 70 #if !defined(CONFIG_SYS_SPD_BUS_NUM) 71 #define CONFIG_SYS_SPD_BUS_NUM 0 72 #endif 73 74 struct i2c_adapter { 75 void (*init)(struct i2c_adapter *adap, int speed, 76 int slaveaddr); 77 int (*probe)(struct i2c_adapter *adap, uint8_t chip); 78 int (*read)(struct i2c_adapter *adap, uint8_t chip, 79 uint addr, int alen, uint8_t *buffer, 80 int len); 81 int (*write)(struct i2c_adapter *adap, uint8_t chip, 82 uint addr, int alen, uint8_t *buffer, 83 int len); 84 uint (*set_bus_speed)(struct i2c_adapter *adap, 85 uint speed); 86 int speed; 87 int slaveaddr; 88 int init_done; 89 int hwadapnr; 90 char *name; 91 }; 92 93 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 94 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \ 95 { \ 96 .init = _init, \ 97 .probe = _probe, \ 98 .read = _read, \ 99 .write = _write, \ 100 .set_bus_speed = _set_speed, \ 101 .speed = _speed, \ 102 .slaveaddr = _slaveaddr, \ 103 .init_done = 0, \ 104 .hwadapnr = _hwadapnr, \ 105 .name = #_name \ 106 }; 107 108 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \ 109 _set_speed, _speed, _slaveaddr, _hwadapnr) \ 110 ll_entry_declare(struct i2c_adapter, _name, i2c) = \ 111 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 112 _set_speed, _speed, _slaveaddr, _hwadapnr, _name); 113 114 struct i2c_adapter *i2c_get_adapter(int index); 115 116 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 117 struct i2c_mux { 118 int id; 119 char name[16]; 120 }; 121 122 struct i2c_next_hop { 123 struct i2c_mux mux; 124 uint8_t chip; 125 uint8_t channel; 126 }; 127 128 struct i2c_bus_hose { 129 int adapter; 130 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS]; 131 }; 132 #define I2C_NULL_HOP {{-1, ""}, 0, 0} 133 extern struct i2c_bus_hose i2c_bus[]; 134 135 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter 136 #else 137 #define I2C_ADAPTER(bus) bus 138 #endif 139 #define I2C_BUS gd->cur_i2c_bus 140 141 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus)) 142 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus) 143 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr) 144 145 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 146 #define I2C_MUX_PCA9540_ID 1 147 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"} 148 #define I2C_MUX_PCA9542_ID 2 149 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"} 150 #define I2C_MUX_PCA9544_ID 3 151 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"} 152 #define I2C_MUX_PCA9547_ID 4 153 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"} 154 #endif 155 156 #ifndef I2C_SOFT_DECLARATIONS 157 # if defined(CONFIG_MPC8260) 158 # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT); 159 # elif defined(CONFIG_8xx) 160 # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; 161 162 # elif (defined(CONFIG_AT91RM9200) || \ 163 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ 164 defined(CONFIG_AT91SAM9263)) && !defined(CONFIG_AT91_LEGACY) 165 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; 166 # else 167 # define I2C_SOFT_DECLARATIONS 168 # endif 169 #endif 170 171 #ifdef CONFIG_8xx 172 /* Set default value for the I2C bus speed on 8xx. In the 173 * future, we'll define these in all 8xx board config files. 174 */ 175 #ifndef CONFIG_SYS_I2C_SPEED 176 #define CONFIG_SYS_I2C_SPEED 50000 177 #endif 178 #endif 179 180 /* 181 * Many boards/controllers/drivers don't support an I2C slave interface so 182 * provide a default slave address for them for use in common code. A real 183 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does 184 * support a slave interface. 185 */ 186 #ifndef CONFIG_SYS_I2C_SLAVE 187 #define CONFIG_SYS_I2C_SLAVE 0xfe 188 #endif 189 190 /* 191 * Initialization, must be called once on start up, may be called 192 * repeatedly to change the speed and slave addresses. 193 */ 194 void i2c_init(int speed, int slaveaddr); 195 void i2c_init_board(void); 196 #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT 197 void i2c_board_late_init(void); 198 #endif 199 200 #if defined(CONFIG_I2C_MUX) 201 202 typedef struct _mux { 203 uchar chip; 204 uchar channel; 205 char *name; 206 struct _mux *next; 207 } I2C_MUX; 208 209 typedef struct _mux_device { 210 int busid; 211 I2C_MUX *mux; /* List of muxes, to reach the device */ 212 struct _mux_device *next; 213 } I2C_MUX_DEVICE; 214 215 I2C_MUX_DEVICE *i2c_mux_search_device(int id); 216 I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf); 217 int i2x_mux_select_mux(int bus); 218 int i2c_mux_ident_muxstring_f (uchar *buf); 219 #endif 220 221 #ifdef CONFIG_SYS_I2C 222 /* 223 * i2c_get_bus_num: 224 * 225 * Returns index of currently active I2C bus. Zero-based. 226 */ 227 unsigned int i2c_get_bus_num(void); 228 229 /* 230 * i2c_set_bus_num: 231 * 232 * Change the active I2C bus. Subsequent read/write calls will 233 * go to this one. 234 * 235 * bus - bus index, zero based 236 * 237 * Returns: 0 on success, not 0 on failure 238 * 239 */ 240 int i2c_set_bus_num(unsigned int bus); 241 242 /* 243 * i2c_init_all(): 244 * 245 * Initializes all I2C adapters in the system. All i2c_adap structures must 246 * be initialized beforehead with function pointers and data, including 247 * speed and slaveaddr. Returns 0 on success, non-0 on failure. 248 */ 249 void i2c_init_all(void); 250 251 /* 252 * Probe the given I2C chip address. Returns 0 if a chip responded, 253 * not 0 on failure. 254 */ 255 int i2c_probe(uint8_t chip); 256 257 /* 258 * Read/Write interface: 259 * chip: I2C chip address, range 0..127 260 * addr: Memory (register) address within the chip 261 * alen: Number of bytes to use for addr (typically 1, 2 for larger 262 * memories, 0 for register type devices with only one 263 * register) 264 * buffer: Where to read/write the data 265 * len: How many bytes to read/write 266 * 267 * Returns: 0 on success, not 0 on failure 268 */ 269 int i2c_read(uint8_t chip, unsigned int addr, int alen, 270 uint8_t *buffer, int len); 271 272 int i2c_write(uint8_t chip, unsigned int addr, int alen, 273 uint8_t *buffer, int len); 274 275 /* 276 * Utility routines to read/write registers. 277 */ 278 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); 279 280 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); 281 282 /* 283 * i2c_set_bus_speed: 284 * 285 * Change the speed of the active I2C bus 286 * 287 * speed - bus speed in Hz 288 * 289 * Returns: new bus speed 290 * 291 */ 292 unsigned int i2c_set_bus_speed(unsigned int speed); 293 294 /* 295 * i2c_get_bus_speed: 296 * 297 * Returns speed of currently active I2C bus in Hz 298 */ 299 300 unsigned int i2c_get_bus_speed(void); 301 302 /* 303 * i2c_reloc_fixup: 304 * 305 * Adjusts I2C pointers after U-Boot is relocated to DRAM 306 */ 307 void i2c_reloc_fixup(void); 308 #else 309 310 /* 311 * Probe the given I2C chip address. Returns 0 if a chip responded, 312 * not 0 on failure. 313 */ 314 int i2c_probe(uchar chip); 315 316 /* 317 * Read/Write interface: 318 * chip: I2C chip address, range 0..127 319 * addr: Memory (register) address within the chip 320 * alen: Number of bytes to use for addr (typically 1, 2 for larger 321 * memories, 0 for register type devices with only one 322 * register) 323 * buffer: Where to read/write the data 324 * len: How many bytes to read/write 325 * 326 * Returns: 0 on success, not 0 on failure 327 */ 328 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len); 329 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); 330 331 /* 332 * Utility routines to read/write registers. 333 */ 334 static inline u8 i2c_reg_read(u8 addr, u8 reg) 335 { 336 u8 buf; 337 338 #ifdef CONFIG_8xx 339 /* MPC8xx needs this. Maybe one day we can get rid of it. */ 340 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 341 #endif 342 343 #ifdef DEBUG 344 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg); 345 #endif 346 347 i2c_read(addr, reg, 1, &buf, 1); 348 349 return buf; 350 } 351 352 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val) 353 { 354 #ifdef CONFIG_8xx 355 /* MPC8xx needs this. Maybe one day we can get rid of it. */ 356 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 357 #endif 358 359 #ifdef DEBUG 360 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n", 361 __func__, addr, reg, val); 362 #endif 363 364 i2c_write(addr, reg, 1, &val, 1); 365 } 366 367 /* 368 * Functions for setting the current I2C bus and its speed 369 */ 370 371 /* 372 * i2c_set_bus_num: 373 * 374 * Change the active I2C bus. Subsequent read/write calls will 375 * go to this one. 376 * 377 * bus - bus index, zero based 378 * 379 * Returns: 0 on success, not 0 on failure 380 * 381 */ 382 int i2c_set_bus_num(unsigned int bus); 383 384 /* 385 * i2c_get_bus_num: 386 * 387 * Returns index of currently active I2C bus. Zero-based. 388 */ 389 390 unsigned int i2c_get_bus_num(void); 391 392 /* 393 * i2c_set_bus_speed: 394 * 395 * Change the speed of the active I2C bus 396 * 397 * speed - bus speed in Hz 398 * 399 * Returns: 0 on success, not 0 on failure 400 * 401 */ 402 int i2c_set_bus_speed(unsigned int); 403 404 /* 405 * i2c_get_bus_speed: 406 * 407 * Returns speed of currently active I2C bus in Hz 408 */ 409 410 unsigned int i2c_get_bus_speed(void); 411 #endif /* CONFIG_SYS_I2C */ 412 413 /* 414 * only for backwardcompatibility, should go away if we switched 415 * completely to new multibus support. 416 */ 417 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) 418 # if !defined(CONFIG_SYS_MAX_I2C_BUS) 419 # define CONFIG_SYS_MAX_I2C_BUS 2 420 # endif 421 # define I2C_MULTI_BUS 0 422 #else 423 # define CONFIG_SYS_MAX_I2C_BUS 1 424 # define I2C_MULTI_BUS 0 425 #endif 426 427 /* NOTE: These two functions MUST be always_inline to avoid code growth! */ 428 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline)); 429 static inline unsigned int I2C_GET_BUS(void) 430 { 431 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0; 432 } 433 434 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline)); 435 static inline void I2C_SET_BUS(unsigned int bus) 436 { 437 if (I2C_MULTI_BUS) 438 i2c_set_bus_num(bus); 439 } 440 441 /* Multi I2C definitions */ 442 enum { 443 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7, 444 I2C_8, I2C_9, I2C_10, 445 }; 446 447 /* Multi I2C busses handling */ 448 #ifdef CONFIG_SOFT_I2C_MULTI_BUS 449 extern int get_multi_scl_pin(void); 450 extern int get_multi_sda_pin(void); 451 extern int multi_i2c_init(void); 452 #endif 453 454 /** 455 * Get FDT values for i2c bus. 456 * 457 * @param blob Device tree blbo 458 * @return the number of I2C bus 459 */ 460 void board_i2c_init(const void *blob); 461 462 /** 463 * Find the I2C bus number by given a FDT I2C node. 464 * 465 * @param blob Device tree blbo 466 * @param node FDT I2C node to find 467 * @return the number of I2C bus (zero based), or -1 on error 468 */ 469 int i2c_get_bus_num_fdt(int node); 470 471 /** 472 * Reset the I2C bus represented by the given a FDT I2C node. 473 * 474 * @param blob Device tree blbo 475 * @param node FDT I2C node to find 476 * @return 0 if port was reset, -1 if not found 477 */ 478 int i2c_reset_port_fdt(const void *blob, int node); 479 #endif /* _I2C_H_ */ 480