xref: /rk3399_rockchip-uboot/include/fm_eth.h (revision 9e758758491b0d7a71bdf1db8cd860b599d7e657)
1 /*
2  * Copyright 2009-2011 Freescale Semiconductor, Inc.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License as
6  * published by the Free Software Foundation; either version 2 of
7  * the License, or (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17  * MA 02111-1307 USA
18  */
19 
20 #ifndef __FM_ETH_H__
21 #define __FM_ETH_H__
22 
23 #include <common.h>
24 #include <asm/types.h>
25 #include <asm/fsl_enet.h>
26 
27 enum fm_port {
28 	FM1_DTSEC1,
29 	FM1_DTSEC2,
30 	FM1_DTSEC3,
31 	FM1_DTSEC4,
32 	FM1_DTSEC5,
33 	FM1_DTSEC6,
34 	FM1_DTSEC9,
35 	FM1_DTSEC10,
36 	FM1_10GEC1,
37 	FM1_10GEC2,
38 	FM2_DTSEC1,
39 	FM2_DTSEC2,
40 	FM2_DTSEC3,
41 	FM2_DTSEC4,
42 	FM2_DTSEC5,
43 	FM2_DTSEC6,
44 	FM2_DTSEC9,
45 	FM2_DTSEC10,
46 	FM2_10GEC1,
47 	FM2_10GEC2,
48 	NUM_FM_PORTS,
49 };
50 
51 enum fm_eth_type {
52 	FM_ETH_1G_E,
53 	FM_ETH_10G_E,
54 };
55 
56 #define CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR	(CONFIG_SYS_FSL_FM1_ADDR + 0xe1120)
57 #define CONFIG_SYS_FM1_TGEC_MDIO_ADDR	(CONFIG_SYS_FSL_FM1_ADDR + 0xf1000)
58 
59 #define DEFAULT_FM_MDIO_NAME "FSL_MDIO0"
60 #define DEFAULT_FM_TGEC_MDIO_NAME "FM_TGEC_MDIO"
61 
62 /* Fman ethernet info struct */
63 #define FM_ETH_INFO_INITIALIZER(idx, pregs) \
64 	.fm		= idx,						\
65 	.phy_regs	= (void *)pregs,				\
66 	.enet_if	= PHY_INTERFACE_MODE_NONE,			\
67 
68 #define FM_DTSEC_INFO_INITIALIZER(idx, n) \
69 {									\
70 	FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR)	\
71 	.index		= idx,						\
72 	.num		= n - 1,					\
73 	.type		= FM_ETH_1G_E,					\
74 	.port		= FM##idx##_DTSEC##n,				\
75 	.rx_port_id	= RX_PORT_1G_BASE + n - 1,			\
76 	.tx_port_id	= TX_PORT_1G_BASE + n - 1,			\
77 	.compat_offset	= CONFIG_SYS_FSL_FM##idx##_OFFSET +		\
78 				offsetof(struct ccsr_fman, mac_1g[n-1]),\
79 }
80 
81 #define FM_TGEC_INFO_INITIALIZER(idx, n) \
82 {									\
83 	FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_TGEC_MDIO_ADDR)	\
84 	.index		= idx,						\
85 	.num		= n - 1,					\
86 	.type		= FM_ETH_10G_E,					\
87 	.port		= FM##idx##_10GEC##n,				\
88 	.rx_port_id	= RX_PORT_10G_BASE + n - 1,			\
89 	.tx_port_id	= TX_PORT_10G_BASE + n - 1,			\
90 	.compat_offset	= CONFIG_SYS_FSL_FM##idx##_OFFSET +		\
91 				offsetof(struct ccsr_fman, mac_10g[n-1]),\
92 }
93 
94 struct fm_eth_info {
95 	u8 enabled;
96 	u8 fm;
97 	u8 num;
98 	u8 phy_addr;
99 	int index;
100 	u16 rx_port_id;
101 	u16 tx_port_id;
102 	enum fm_port port;
103 	enum fm_eth_type type;
104 	void *phy_regs;
105 	phy_interface_t enet_if;
106 	u32 compat_offset;
107 	struct mii_dev *bus;
108 };
109 
110 struct tgec_mdio_info {
111 	struct tgec_mdio_controller *regs;
112 	char *name;
113 };
114 
115 int fm_tgec_mdio_init(bd_t *bis, struct tgec_mdio_info *info);
116 int fm_standard_init(bd_t *bis);
117 void fman_enet_init(void);
118 void fdt_fixup_fman_ethernet(void *fdt);
119 phy_interface_t fm_info_get_enet_if(enum fm_port port);
120 void fm_info_set_phy_address(enum fm_port port, int address);
121 int fm_info_get_phy_address(enum fm_port port);
122 void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus);
123 void fm_disable_port(enum fm_port port);
124 
125 #endif
126