xref: /rk3399_rockchip-uboot/include/fm_eth.h (revision 99abf7ded3b8daf82bdf1a60d1a92cb76c482c9a)
1c916d7c9SKumar Gala /*
2c916d7c9SKumar Gala  * Copyright 2009-2011 Freescale Semiconductor, Inc.
3c916d7c9SKumar Gala  *
4c916d7c9SKumar Gala  * This program is free software; you can redistribute it and/or
5c916d7c9SKumar Gala  * modify it under the terms of the GNU General Public License as
6c916d7c9SKumar Gala  * published by the Free Software Foundation; either version 2 of
7c916d7c9SKumar Gala  * the License, or (at your option) any later version.
8c916d7c9SKumar Gala  *
9c916d7c9SKumar Gala  * This program is distributed in the hope that it will be useful,
10c916d7c9SKumar Gala  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11c916d7c9SKumar Gala  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12c916d7c9SKumar Gala  * GNU General Public License for more details.
13c916d7c9SKumar Gala  *
14c916d7c9SKumar Gala  * You should have received a copy of the GNU General Public License
15c916d7c9SKumar Gala  * along with this program; if not, write to the Free Software
16c916d7c9SKumar Gala  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17c916d7c9SKumar Gala  * MA 02111-1307 USA
18c916d7c9SKumar Gala  */
19c916d7c9SKumar Gala 
20c916d7c9SKumar Gala #ifndef __FM_ETH_H__
21c916d7c9SKumar Gala #define __FM_ETH_H__
22c916d7c9SKumar Gala 
23c916d7c9SKumar Gala #include <common.h>
24c916d7c9SKumar Gala #include <asm/types.h>
25c916d7c9SKumar Gala #include <asm/fsl_enet.h>
26c916d7c9SKumar Gala 
27c916d7c9SKumar Gala enum fm_port {
28c916d7c9SKumar Gala 	FM1_DTSEC1,
29c916d7c9SKumar Gala 	FM1_DTSEC2,
30c916d7c9SKumar Gala 	FM1_DTSEC3,
31c916d7c9SKumar Gala 	FM1_DTSEC4,
32c916d7c9SKumar Gala 	FM1_DTSEC5,
33c916d7c9SKumar Gala 	FM1_10GEC1,
34c916d7c9SKumar Gala 	FM2_DTSEC1,
35c916d7c9SKumar Gala 	FM2_DTSEC2,
36c916d7c9SKumar Gala 	FM2_DTSEC3,
37c916d7c9SKumar Gala 	FM2_DTSEC4,
38*99abf7deSTimur Tabi 	FM2_DTSEC5,
39c916d7c9SKumar Gala 	FM2_10GEC1,
40c916d7c9SKumar Gala 	NUM_FM_PORTS,
41c916d7c9SKumar Gala };
42c916d7c9SKumar Gala 
43c916d7c9SKumar Gala enum fm_eth_type {
44c916d7c9SKumar Gala 	FM_ETH_1G_E,
45c916d7c9SKumar Gala 	FM_ETH_10G_E,
46c916d7c9SKumar Gala };
47c916d7c9SKumar Gala 
48c916d7c9SKumar Gala #define CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR	(CONFIG_SYS_FSL_FM1_ADDR + 0xe1120)
49c916d7c9SKumar Gala #define CONFIG_SYS_FM1_TGEC_MDIO_ADDR	(CONFIG_SYS_FSL_FM1_ADDR + 0xf1000)
50c916d7c9SKumar Gala 
51c916d7c9SKumar Gala #define DEFAULT_FM_MDIO_NAME "FSL_MDIO0"
52c916d7c9SKumar Gala #define DEFAULT_FM_TGEC_MDIO_NAME "FM_TGEC_MDIO"
53c916d7c9SKumar Gala 
54c916d7c9SKumar Gala /* Fman ethernet info struct */
55c916d7c9SKumar Gala #define FM_ETH_INFO_INITIALIZER(idx, pregs) \
56c916d7c9SKumar Gala 	.fm		= idx,						\
57c916d7c9SKumar Gala 	.phy_regs	= (void *)pregs,				\
58c916d7c9SKumar Gala 	.enet_if	= PHY_INTERFACE_MODE_NONE,			\
59c916d7c9SKumar Gala 
60c916d7c9SKumar Gala #define FM_DTSEC_INFO_INITIALIZER(idx, n) \
61c916d7c9SKumar Gala {									\
62c916d7c9SKumar Gala 	FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR)	\
63c916d7c9SKumar Gala 	.index		= idx,						\
64c916d7c9SKumar Gala 	.num		= n - 1,					\
65c916d7c9SKumar Gala 	.type		= FM_ETH_1G_E,					\
66c916d7c9SKumar Gala 	.port		= FM##idx##_DTSEC##n,				\
67c916d7c9SKumar Gala 	.rx_port_id	= RX_PORT_1G_BASE + n - 1,			\
68c916d7c9SKumar Gala 	.tx_port_id	= TX_PORT_1G_BASE + n - 1,			\
69c916d7c9SKumar Gala 	.compat_offset	= CONFIG_SYS_FSL_FM##idx##_OFFSET +		\
70c916d7c9SKumar Gala 				offsetof(struct ccsr_fman, mac_1g[n-1]),\
71c916d7c9SKumar Gala }
72c916d7c9SKumar Gala 
73c916d7c9SKumar Gala #define FM_TGEC_INFO_INITIALIZER(idx, n) \
74c916d7c9SKumar Gala {									\
75c916d7c9SKumar Gala 	FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_TGEC_MDIO_ADDR)	\
76c916d7c9SKumar Gala 	.index		= idx,						\
77c916d7c9SKumar Gala 	.num		= n - 1,					\
78c916d7c9SKumar Gala 	.type		= FM_ETH_10G_E,					\
79c916d7c9SKumar Gala 	.port		= FM##idx##_10GEC##n,				\
80c916d7c9SKumar Gala 	.rx_port_id	= RX_PORT_10G_BASE + n - 1,			\
81c916d7c9SKumar Gala 	.tx_port_id	= TX_PORT_10G_BASE + n - 1,			\
82c916d7c9SKumar Gala 	.compat_offset	= CONFIG_SYS_FSL_FM##idx##_OFFSET +		\
83c916d7c9SKumar Gala 				offsetof(struct ccsr_fman, mac_10g[n-1]),\
84c916d7c9SKumar Gala }
85c916d7c9SKumar Gala 
86c916d7c9SKumar Gala struct fm_eth_info {
87c916d7c9SKumar Gala 	u8 enabled;
88c916d7c9SKumar Gala 	u8 fm;
89c916d7c9SKumar Gala 	u8 num;
90c916d7c9SKumar Gala 	u8 phy_addr;
91c916d7c9SKumar Gala 	int index;
92c916d7c9SKumar Gala 	u16 rx_port_id;
93c916d7c9SKumar Gala 	u16 tx_port_id;
94c916d7c9SKumar Gala 	enum fm_port port;
95c916d7c9SKumar Gala 	enum fm_eth_type type;
96c916d7c9SKumar Gala 	void *phy_regs;
97c916d7c9SKumar Gala 	phy_interface_t enet_if;
98c916d7c9SKumar Gala 	u32 compat_offset;
99c916d7c9SKumar Gala 	struct mii_dev *bus;
100c916d7c9SKumar Gala };
101c916d7c9SKumar Gala 
102c916d7c9SKumar Gala struct tgec_mdio_info {
103c916d7c9SKumar Gala 	struct tgec_mdio_controller *regs;
104c916d7c9SKumar Gala 	char *name;
105c916d7c9SKumar Gala };
106c916d7c9SKumar Gala 
107c916d7c9SKumar Gala int fm_tgec_mdio_init(bd_t *bis, struct tgec_mdio_info *info);
108c916d7c9SKumar Gala int fm_standard_init(bd_t *bis);
109c916d7c9SKumar Gala void fman_enet_init(void);
110c916d7c9SKumar Gala void fdt_fixup_fman_ethernet(void *fdt);
111c916d7c9SKumar Gala phy_interface_t fm_info_get_enet_if(enum fm_port port);
112c916d7c9SKumar Gala void fm_info_set_phy_address(enum fm_port port, int address);
113c916d7c9SKumar Gala void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus);
11469a85242SKumar Gala void fm_disable_port(enum fm_port port);
115c916d7c9SKumar Gala 
116c916d7c9SKumar Gala #endif
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