100d10eb0SMacpaul Lin /* 200d10eb0SMacpaul Lin * (C) Copyright 2009 Faraday Technology 300d10eb0SMacpaul Lin * Po-Yu Chuang <ratbert@faraday-tech.com> 400d10eb0SMacpaul Lin * 500d10eb0SMacpaul Lin * This program is free software; you can redistribute it and/or modify 600d10eb0SMacpaul Lin * it under the terms of the GNU General Public License as published by 700d10eb0SMacpaul Lin * the Free Software Foundation; either version 2 of the License, or 800d10eb0SMacpaul Lin * (at your option) any later version. 900d10eb0SMacpaul Lin * 1000d10eb0SMacpaul Lin * This program is distributed in the hope that it will be useful, 1100d10eb0SMacpaul Lin * but WITHOUT ANY WARRANTY; without even the implied warranty of 1200d10eb0SMacpaul Lin * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1300d10eb0SMacpaul Lin * GNU General Public License for more details. 1400d10eb0SMacpaul Lin * 1500d10eb0SMacpaul Lin * You should have received a copy of the GNU General Public License 1600d10eb0SMacpaul Lin * along with this program; if not, write to the Free Software 1700d10eb0SMacpaul Lin * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 1800d10eb0SMacpaul Lin */ 1900d10eb0SMacpaul Lin 2000d10eb0SMacpaul Lin /* 2100d10eb0SMacpaul Lin * Static Memory Controller 2200d10eb0SMacpaul Lin */ 2300d10eb0SMacpaul Lin #ifndef __FTSMC020_H 2400d10eb0SMacpaul Lin #define __FTSMC020_H 2500d10eb0SMacpaul Lin 2600d10eb0SMacpaul Lin #ifndef __ASSEMBLY__ 2700d10eb0SMacpaul Lin 2856cd2472SMacpaul Lin struct ftsmc020_bank { 2956cd2472SMacpaul Lin unsigned int cr; 3056cd2472SMacpaul Lin unsigned int tpr; 3156cd2472SMacpaul Lin }; 3256cd2472SMacpaul Lin 3300d10eb0SMacpaul Lin struct ftsmc020 { 3456cd2472SMacpaul Lin struct ftsmc020_bank bank[4]; /* 0x00 - 0x1c */ 3500d10eb0SMacpaul Lin unsigned int pad[8]; /* 0x20 - 0x3c */ 3600d10eb0SMacpaul Lin unsigned int ssr; /* 0x40 */ 3700d10eb0SMacpaul Lin }; 3800d10eb0SMacpaul Lin 3900d10eb0SMacpaul Lin void ftsmc020_init(void); 4000d10eb0SMacpaul Lin 4100d10eb0SMacpaul Lin #endif /* __ASSEMBLY__ */ 4200d10eb0SMacpaul Lin 4300d10eb0SMacpaul Lin /* 4400d10eb0SMacpaul Lin * Memory Bank Configuration Register 4500d10eb0SMacpaul Lin */ 4600d10eb0SMacpaul Lin #define FTSMC020_BANK_ENABLE (1 << 28) 4700d10eb0SMacpaul Lin #define FTSMC020_BANK_BASE(x) ((x) & 0x0fff1000) 4800d10eb0SMacpaul Lin 4900d10eb0SMacpaul Lin #define FTSMC020_BANK_WPROT (1 << 11) 5000d10eb0SMacpaul Lin 51*10ba1d3cSMacpaul Lin #define FTSMC020_BANK_TYPE1 (1 << 10) 52*10ba1d3cSMacpaul Lin #define FTSMC020_BANK_TYPE2 (1 << 9) 53*10ba1d3cSMacpaul Lin #define FTSMC020_BANK_TYPE3 (1 << 8) 54*10ba1d3cSMacpaul Lin 5500d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_32K (0xb << 4) 5600d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_64K (0xc << 4) 5700d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_128K (0xd << 4) 5800d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_256K (0xe << 4) 5900d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_512K (0xf << 4) 6000d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_1M (0x0 << 4) 6100d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_2M (0x1 << 4) 6200d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_4M (0x2 << 4) 6300d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_8M (0x3 << 4) 6400d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_16M (0x4 << 4) 6500d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_32M (0x5 << 4) 66*10ba1d3cSMacpaul Lin #define FTSMC020_BANK_SIZE_64M (0x6 << 4) 6700d10eb0SMacpaul Lin 6800d10eb0SMacpaul Lin #define FTSMC020_BANK_MBW_8 (0x0 << 0) 6900d10eb0SMacpaul Lin #define FTSMC020_BANK_MBW_16 (0x1 << 0) 7000d10eb0SMacpaul Lin #define FTSMC020_BANK_MBW_32 (0x2 << 0) 7100d10eb0SMacpaul Lin 7200d10eb0SMacpaul Lin /* 7300d10eb0SMacpaul Lin * Memory Bank Timing Parameter Register 7400d10eb0SMacpaul Lin */ 7500d10eb0SMacpaul Lin #define FTSMC020_TPR_ETRNA(x) (((x) & 0xf) << 28) 7600d10eb0SMacpaul Lin #define FTSMC020_TPR_EATI(x) (((x) & 0xf) << 24) 7700d10eb0SMacpaul Lin #define FTSMC020_TPR_RBE (1 << 20) 7800d10eb0SMacpaul Lin #define FTSMC020_TPR_AST(x) (((x) & 0x3) << 18) 7900d10eb0SMacpaul Lin #define FTSMC020_TPR_CTW(x) (((x) & 0x3) << 16) 8000d10eb0SMacpaul Lin #define FTSMC020_TPR_ATI(x) (((x) & 0xf) << 12) 8100d10eb0SMacpaul Lin #define FTSMC020_TPR_AT2(x) (((x) & 0x3) << 8) 8200d10eb0SMacpaul Lin #define FTSMC020_TPR_WTC(x) (((x) & 0x3) << 6) 8300d10eb0SMacpaul Lin #define FTSMC020_TPR_AHT(x) (((x) & 0x3) << 4) 8400d10eb0SMacpaul Lin #define FTSMC020_TPR_TRNA(x) (((x) & 0xf) << 0) 8500d10eb0SMacpaul Lin 8600d10eb0SMacpaul Lin #endif /* __FTSMC020_H */ 87