xref: /rk3399_rockchip-uboot/include/faraday/ftsmc020.h (revision 00d10eb0410d2459727307d5eea562247959db2f)
1*00d10eb0SMacpaul Lin /*
2*00d10eb0SMacpaul Lin  * (C) Copyright 2009 Faraday Technology
3*00d10eb0SMacpaul Lin  * Po-Yu Chuang <ratbert@faraday-tech.com>
4*00d10eb0SMacpaul Lin  *
5*00d10eb0SMacpaul Lin  * This program is free software; you can redistribute it and/or modify
6*00d10eb0SMacpaul Lin  * it under the terms of the GNU General Public License as published by
7*00d10eb0SMacpaul Lin  * the Free Software Foundation; either version 2 of the License, or
8*00d10eb0SMacpaul Lin  * (at your option) any later version.
9*00d10eb0SMacpaul Lin  *
10*00d10eb0SMacpaul Lin  * This program is distributed in the hope that it will be useful,
11*00d10eb0SMacpaul Lin  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12*00d10eb0SMacpaul Lin  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13*00d10eb0SMacpaul Lin  * GNU General Public License for more details.
14*00d10eb0SMacpaul Lin  *
15*00d10eb0SMacpaul Lin  * You should have received a copy of the GNU General Public License
16*00d10eb0SMacpaul Lin  * along with this program; if not, write to the Free Software
17*00d10eb0SMacpaul Lin  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18*00d10eb0SMacpaul Lin  */
19*00d10eb0SMacpaul Lin 
20*00d10eb0SMacpaul Lin /*
21*00d10eb0SMacpaul Lin  * Static Memory Controller
22*00d10eb0SMacpaul Lin  */
23*00d10eb0SMacpaul Lin #ifndef __FTSMC020_H
24*00d10eb0SMacpaul Lin #define __FTSMC020_H
25*00d10eb0SMacpaul Lin 
26*00d10eb0SMacpaul Lin #ifndef __ASSEMBLY__
27*00d10eb0SMacpaul Lin 
28*00d10eb0SMacpaul Lin struct ftsmc020 {
29*00d10eb0SMacpaul Lin 	struct {
30*00d10eb0SMacpaul Lin 		unsigned int	cr;	/* 0x00, 0x08, 0x10, 0x18 */
31*00d10eb0SMacpaul Lin 		unsigned int	tpr;	/* 0x04, 0x0c, 0x14, 0x1c */
32*00d10eb0SMacpaul Lin 	} bank[4];
33*00d10eb0SMacpaul Lin 	unsigned int	pad[8];	/* 0x20 - 0x3c */
34*00d10eb0SMacpaul Lin 	unsigned int	ssr;	/* 0x40 */
35*00d10eb0SMacpaul Lin };
36*00d10eb0SMacpaul Lin 
37*00d10eb0SMacpaul Lin void ftsmc020_init(void);
38*00d10eb0SMacpaul Lin 
39*00d10eb0SMacpaul Lin #endif /* __ASSEMBLY__ */
40*00d10eb0SMacpaul Lin 
41*00d10eb0SMacpaul Lin /*
42*00d10eb0SMacpaul Lin  * Memory Bank Configuration Register
43*00d10eb0SMacpaul Lin  */
44*00d10eb0SMacpaul Lin #define FTSMC020_BANK_ENABLE	(1 << 28)
45*00d10eb0SMacpaul Lin #define FTSMC020_BANK_BASE(x)	((x) & 0x0fff1000)
46*00d10eb0SMacpaul Lin 
47*00d10eb0SMacpaul Lin #define FTSMC020_BANK_WPROT	(1 << 11)
48*00d10eb0SMacpaul Lin 
49*00d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_32K	(0xb << 4)
50*00d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_64K	(0xc << 4)
51*00d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_128K	(0xd << 4)
52*00d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_256K	(0xe << 4)
53*00d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_512K	(0xf << 4)
54*00d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_1M	(0x0 << 4)
55*00d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_2M	(0x1 << 4)
56*00d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_4M	(0x2 << 4)
57*00d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_8M	(0x3 << 4)
58*00d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_16M	(0x4 << 4)
59*00d10eb0SMacpaul Lin #define FTSMC020_BANK_SIZE_32M	(0x5 << 4)
60*00d10eb0SMacpaul Lin 
61*00d10eb0SMacpaul Lin #define FTSMC020_BANK_MBW_8	(0x0 << 0)
62*00d10eb0SMacpaul Lin #define FTSMC020_BANK_MBW_16	(0x1 << 0)
63*00d10eb0SMacpaul Lin #define FTSMC020_BANK_MBW_32	(0x2 << 0)
64*00d10eb0SMacpaul Lin 
65*00d10eb0SMacpaul Lin /*
66*00d10eb0SMacpaul Lin  * Memory Bank Timing Parameter Register
67*00d10eb0SMacpaul Lin  */
68*00d10eb0SMacpaul Lin #define FTSMC020_TPR_ETRNA(x)	(((x) & 0xf) << 28)
69*00d10eb0SMacpaul Lin #define FTSMC020_TPR_EATI(x)	(((x) & 0xf) << 24)
70*00d10eb0SMacpaul Lin #define FTSMC020_TPR_RBE	(1 << 20)
71*00d10eb0SMacpaul Lin #define FTSMC020_TPR_AST(x)	(((x) & 0x3) << 18)
72*00d10eb0SMacpaul Lin #define FTSMC020_TPR_CTW(x)	(((x) & 0x3) << 16)
73*00d10eb0SMacpaul Lin #define FTSMC020_TPR_ATI(x)	(((x) & 0xf) << 12)
74*00d10eb0SMacpaul Lin #define FTSMC020_TPR_AT2(x)	(((x) & 0x3) << 8)
75*00d10eb0SMacpaul Lin #define FTSMC020_TPR_WTC(x)	(((x) & 0x3) << 6)
76*00d10eb0SMacpaul Lin #define FTSMC020_TPR_AHT(x)	(((x) & 0x3) << 4)
77*00d10eb0SMacpaul Lin #define FTSMC020_TPR_TRNA(x)	(((x) & 0xf) << 0)
78*00d10eb0SMacpaul Lin 
79*00d10eb0SMacpaul Lin #endif	/* __FTSMC020_H */
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