1 /* 2 * Faraday FTPCI100 PCI Bridge Controller Device Driver Implementation 3 * 4 * Copyright (C) 2010 Andes Technology Corporation 5 * Gavin Guo, Andes Technology Corporation <gavinguo@andestech.com> 6 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 21 */ 22 23 #ifndef __FTPCI100_H 24 #define __FTPCI100_H 25 26 /* AHB Control Registers */ 27 struct ftpci100_ahbc { 28 unsigned int iosize; /* 0x00 - I/O Space Size Signal */ 29 unsigned int prot; /* 0x04 - AHB Protection */ 30 unsigned int rsved[8]; /* 0x08-0x24 - Reserved */ 31 unsigned int conf; /* 0x28 - PCI Configuration */ 32 unsigned int data; /* 0x2c - PCI Configuration DATA */ 33 }; 34 35 /* 36 * FTPCI100_IOSIZE_REG's constant definitions 37 */ 38 #define FTPCI100_BASE_IO_SIZE(x) (ffs(x) - 1) /* 1M - 2048M */ 39 40 /* 41 * PCI Configuration Register 42 */ 43 #define PCI_INT_MASK 0x4c 44 #define PCI_MEM_BASE_SIZE1 0x50 45 #define PCI_MEM_BASE_SIZE2 0x54 46 #define PCI_MEM_BASE_SIZE3 0x58 47 48 /* 49 * PCI_INT_MASK's bit definitions 50 */ 51 #define PCI_INTA_ENABLE (1 << 22) 52 #define PCI_INTB_ENABLE (1 << 23) 53 #define PCI_INTC_ENABLE (1 << 24) 54 #define PCI_INTD_ENABLE (1 << 25) 55 56 /* 57 * PCI_MEM_BASE_SIZE1's constant definitions 58 */ 59 #define FTPCI100_BASE_ADR_SIZE(x) ((ffs(x) - 1) << 16) /* 1M - 2048M */ 60 61 #define FTPCI100_MAX_FUNCTIONS 20 62 #define PCI_IRQ_LINES 4 63 64 #define MAX_BUS_NUM 256 65 #define MAX_DEV_NUM 32 66 #define MAX_FUN_NUM 8 67 68 #define PCI_MAX_BAR_PER_FUNC 6 69 70 /* 71 * PCI_MEM_SIZE 72 */ 73 #define FTPCI100_MEM_SIZE(x) (ffs(x) << 24) 74 75 /* This definition is used by pci_ftpci_init() */ 76 #define FTPCI100_BRIDGE_VENDORID 0x159b 77 #define FTPCI100_BRIDGE_DEVICEID 0x4321 78 79 void pci_ftpci_init(void); 80 81 struct pcibar { 82 unsigned int size; 83 unsigned int addr; 84 }; 85 86 struct pci_config { 87 unsigned int bus; 88 unsigned int dev; /* device */ 89 unsigned int func; 90 unsigned int pin; 91 unsigned short v_id; /* vendor id */ 92 unsigned short d_id; /* device id */ 93 struct pcibar bar[PCI_MAX_BAR_PER_FUNC + 1]; 94 }; 95 96 #endif 97