include/faraday/ftpci100.h

8599515fSGabor Juhos/*
8599515fSGabor Juhos * Faraday FTPCI100 PCI Bridge Controller Device Driver Implementation
8599515fSGabor Juhos *
8599515fSGabor Juhos * Copyright (C) 2010 Andes Technology Corporation
8599515fSGabor Juhos * Gavin Guo, Andes Technology Corporation <gavinguo@andestech.com>
8599515fSGabor Juhos * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
8599515fSGabor Juhos *
*aaf5e825STom Rini * SPDX-License-Identifier:	GPL-2.0+
8599515fSGabor Juhos */
8599515fSGabor Juhos
8599515fSGabor Juhos#ifndef __FTPCI100_H
8599515fSGabor Juhos#define __FTPCI100_H
8599515fSGabor Juhos
8599515fSGabor Juhos/* AHB Control Registers */
8599515fSGabor Juhosstruct ftpci100_ahbc {
8599515fSGabor Juhos	unsigned int iosize;		/* 0x00 - I/O Space Size Signal */
8599515fSGabor Juhos	unsigned int prot;		/* 0x04 - AHB Protection */
8599515fSGabor Juhos	unsigned int rsved[8];		/* 0x08-0x24 - Reserved */
8599515fSGabor Juhos	unsigned int conf;		/* 0x28 - PCI Configuration */
8599515fSGabor Juhos	unsigned int data;		/* 0x2c - PCI Configuration DATA */
8599515fSGabor Juhos};
8599515fSGabor Juhos
8599515fSGabor Juhos/*
8599515fSGabor Juhos * FTPCI100_IOSIZE_REG's constant definitions
8599515fSGabor Juhos */
8599515fSGabor Juhos#define FTPCI100_BASE_IO_SIZE(x)	(ffs(x) - 1)	/* 1M - 2048M */
8599515fSGabor Juhos
8599515fSGabor Juhos/*
8599515fSGabor Juhos * PCI Configuration Register
8599515fSGabor Juhos */
8599515fSGabor Juhos#define PCI_INT_MASK			0x4c
8599515fSGabor Juhos#define PCI_MEM_BASE_SIZE1		0x50
8599515fSGabor Juhos#define PCI_MEM_BASE_SIZE2		0x54
8599515fSGabor Juhos#define PCI_MEM_BASE_SIZE3		0x58
8599515fSGabor Juhos
8599515fSGabor Juhos/*
8599515fSGabor Juhos * PCI_INT_MASK's bit definitions
8599515fSGabor Juhos */
8599515fSGabor Juhos#define PCI_INTA_ENABLE			(1 << 22)
8599515fSGabor Juhos#define PCI_INTB_ENABLE			(1 << 23)
8599515fSGabor Juhos#define PCI_INTC_ENABLE			(1 << 24)
8599515fSGabor Juhos#define PCI_INTD_ENABLE			(1 << 25)
8599515fSGabor Juhos
8599515fSGabor Juhos/*
8599515fSGabor Juhos * PCI_MEM_BASE_SIZE1's constant definitions
8599515fSGabor Juhos */
8599515fSGabor Juhos#define FTPCI100_BASE_ADR_SIZE(x)	((ffs(x) - 1) << 16)	/* 1M - 2048M */
8599515fSGabor Juhos
8599515fSGabor Juhos#define FTPCI100_MAX_FUNCTIONS		20
8599515fSGabor Juhos#define PCI_IRQ_LINES			4
8599515fSGabor Juhos
8599515fSGabor Juhos#define MAX_BUS_NUM			256
8599515fSGabor Juhos#define MAX_DEV_NUM			32
8599515fSGabor Juhos#define MAX_FUN_NUM			8
8599515fSGabor Juhos
8599515fSGabor Juhos#define PCI_MAX_BAR_PER_FUNC		6
8599515fSGabor Juhos
8599515fSGabor Juhos/*
8599515fSGabor Juhos * PCI_MEM_SIZE
8599515fSGabor Juhos */
8599515fSGabor Juhos#define FTPCI100_MEM_SIZE(x)		(ffs(x) << 24)
8599515fSGabor Juhos
8599515fSGabor Juhos/* This definition is used by pci_ftpci_init() */
8599515fSGabor Juhos#define FTPCI100_BRIDGE_VENDORID		0x159b
8599515fSGabor Juhos#define FTPCI100_BRIDGE_DEVICEID		0x4321
8599515fSGabor Juhos
8599515fSGabor Juhosvoid pci_ftpci_init(void);
8599515fSGabor Juhos
8599515fSGabor Juhosstruct pcibar {
8599515fSGabor Juhos	unsigned int size;
8599515fSGabor Juhos	unsigned int addr;
8599515fSGabor Juhos};
8599515fSGabor Juhos
8599515fSGabor Juhosstruct pci_config {
8599515fSGabor Juhos	unsigned int bus;
8599515fSGabor Juhos	unsigned int dev;				/* device */
8599515fSGabor Juhos	unsigned int func;
8599515fSGabor Juhos	unsigned int pin;
8599515fSGabor Juhos	unsigned short v_id;				/* vendor id */
8599515fSGabor Juhos	unsigned short d_id;				/* device id */
8599515fSGabor Juhos	struct pcibar bar[PCI_MAX_BAR_PER_FUNC + 1];
8599515fSGabor Juhos};
8599515fSGabor Juhos
8599515fSGabor Juhos#endif