1*4bb87d2bSMacpaul Lin /* 2*4bb87d2bSMacpaul Lin * Copyright (C) 2011 Andes Technology Corporation 3*4bb87d2bSMacpaul Lin * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> 4*4bb87d2bSMacpaul Lin * 5*4bb87d2bSMacpaul Lin * This program is free software; you can redistribute it and/or modify 6*4bb87d2bSMacpaul Lin * it under the terms of the GNU General Public License as published by 7*4bb87d2bSMacpaul Lin * the Free Software Foundation; either version 2 of the License, or 8*4bb87d2bSMacpaul Lin * (at your option) any later version. 9*4bb87d2bSMacpaul Lin * 10*4bb87d2bSMacpaul Lin * This program is distributed in the hope that it will be useful, 11*4bb87d2bSMacpaul Lin * but WITHOUT ANY WARRANTY; without even the implied warranty of 12*4bb87d2bSMacpaul Lin * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13*4bb87d2bSMacpaul Lin * GNU General Public License for more details. 14*4bb87d2bSMacpaul Lin * 15*4bb87d2bSMacpaul Lin * You should have received a copy of the GNU General Public License 16*4bb87d2bSMacpaul Lin * along with this program; if not, write to the Free Software 17*4bb87d2bSMacpaul Lin * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 18*4bb87d2bSMacpaul Lin */ 19*4bb87d2bSMacpaul Lin 20*4bb87d2bSMacpaul Lin /* FTAHBC020S - AHB Controller (Arbiter/Decoder) definitions */ 21*4bb87d2bSMacpaul Lin #ifndef __FTAHBC020S_H 22*4bb87d2bSMacpaul Lin #define __FTAHBC202S_H 23*4bb87d2bSMacpaul Lin 24*4bb87d2bSMacpaul Lin /* Registers Offsets */ 25*4bb87d2bSMacpaul Lin 26*4bb87d2bSMacpaul Lin /* 27*4bb87d2bSMacpaul Lin * AHB Slave BSR, offset: n * 4, n=0~31 28*4bb87d2bSMacpaul Lin */ 29*4bb87d2bSMacpaul Lin #ifndef __ASSEMBLY__ 30*4bb87d2bSMacpaul Lin struct ftahbc02s { 31*4bb87d2bSMacpaul Lin unsigned int s_bsr[32]; /* 0x00-0x7c - Slave n Base/Size Reg */ 32*4bb87d2bSMacpaul Lin unsigned int pcr; /* 0x80 - Priority Ctrl Reg */ 33*4bb87d2bSMacpaul Lin unsigned int tcrg; /* 0x84 - Transfer Ctrl Reg */ 34*4bb87d2bSMacpaul Lin unsigned int cr; /* 0x88 - Ctrl Reg */ 35*4bb87d2bSMacpaul Lin }; 36*4bb87d2bSMacpaul Lin #endif /* __ASSEMBLY__ */ 37*4bb87d2bSMacpaul Lin 38*4bb87d2bSMacpaul Lin /* 39*4bb87d2bSMacpaul Lin * FTAHBC020S_SLAVE_BSR - Slave n Base / Size Register 40*4bb87d2bSMacpaul Lin */ 41*4bb87d2bSMacpaul Lin #define FTAHBC020S_SLAVE_BSR_BASE(x) (((x) & 0xfff) << 20) 42*4bb87d2bSMacpaul Lin #define FTAHBC020S_SLAVE_BSR_SIZE(x) (((x) & 0xf) << 16) 43*4bb87d2bSMacpaul Lin /* The value of b(16:19)SLAVE_BSR_SIZE: 1M-2048M, must be power of 2 */ 44*4bb87d2bSMacpaul Lin #define FTAHBC020S_BSR_SIZE(x) (ffs(x) - 1) /* size of Addr Space */ 45*4bb87d2bSMacpaul Lin 46*4bb87d2bSMacpaul Lin /* 47*4bb87d2bSMacpaul Lin * FTAHBC020S_PCR - Priority Control Register 48*4bb87d2bSMacpaul Lin */ 49*4bb87d2bSMacpaul Lin #define FTAHBC020S_PCR_PLEVEL_(x) (1 << (x)) /* x: 1-15 */ 50*4bb87d2bSMacpaul Lin 51*4bb87d2bSMacpaul Lin /* 52*4bb87d2bSMacpaul Lin * FTAHBC020S_CR - Interrupt Control Register 53*4bb87d2bSMacpaul Lin */ 54*4bb87d2bSMacpaul Lin #define FTAHBC020S_CR_INTSTS (1 << 24) 55*4bb87d2bSMacpaul Lin #define FTAHBC020S_CR_RESP(x) (((x) & 0x3) << 20) 56*4bb87d2bSMacpaul Lin #define FTAHBC020S_CR_INTSMASK (1 << 16) 57*4bb87d2bSMacpaul Lin #define FTAHBC020S_CR_REMAP (1 << 0) 58*4bb87d2bSMacpaul Lin 59*4bb87d2bSMacpaul Lin #endif /* __FTAHBC020S_H */ 60