14bb87d2bSMacpaul Lin /* 24bb87d2bSMacpaul Lin * Copyright (C) 2011 Andes Technology Corporation 34bb87d2bSMacpaul Lin * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> 44bb87d2bSMacpaul Lin * 5*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 64bb87d2bSMacpaul Lin */ 74bb87d2bSMacpaul Lin 84bb87d2bSMacpaul Lin /* FTAHBC020S - AHB Controller (Arbiter/Decoder) definitions */ 94bb87d2bSMacpaul Lin #ifndef __FTAHBC020S_H 104bb87d2bSMacpaul Lin #define __FTAHBC202S_H 114bb87d2bSMacpaul Lin 124bb87d2bSMacpaul Lin /* Registers Offsets */ 134bb87d2bSMacpaul Lin 144bb87d2bSMacpaul Lin /* 154bb87d2bSMacpaul Lin * AHB Slave BSR, offset: n * 4, n=0~31 164bb87d2bSMacpaul Lin */ 174bb87d2bSMacpaul Lin #ifndef __ASSEMBLY__ 184bb87d2bSMacpaul Lin struct ftahbc02s { 194bb87d2bSMacpaul Lin unsigned int s_bsr[32]; /* 0x00-0x7c - Slave n Base/Size Reg */ 204bb87d2bSMacpaul Lin unsigned int pcr; /* 0x80 - Priority Ctrl Reg */ 214bb87d2bSMacpaul Lin unsigned int tcrg; /* 0x84 - Transfer Ctrl Reg */ 224bb87d2bSMacpaul Lin unsigned int cr; /* 0x88 - Ctrl Reg */ 234bb87d2bSMacpaul Lin }; 244bb87d2bSMacpaul Lin #endif /* __ASSEMBLY__ */ 254bb87d2bSMacpaul Lin 264bb87d2bSMacpaul Lin /* 274bb87d2bSMacpaul Lin * FTAHBC020S_SLAVE_BSR - Slave n Base / Size Register 284bb87d2bSMacpaul Lin */ 294bb87d2bSMacpaul Lin #define FTAHBC020S_SLAVE_BSR_BASE(x) (((x) & 0xfff) << 20) 304bb87d2bSMacpaul Lin #define FTAHBC020S_SLAVE_BSR_SIZE(x) (((x) & 0xf) << 16) 314bb87d2bSMacpaul Lin /* The value of b(16:19)SLAVE_BSR_SIZE: 1M-2048M, must be power of 2 */ 324bb87d2bSMacpaul Lin #define FTAHBC020S_BSR_SIZE(x) (ffs(x) - 1) /* size of Addr Space */ 334bb87d2bSMacpaul Lin 344bb87d2bSMacpaul Lin /* 354bb87d2bSMacpaul Lin * FTAHBC020S_PCR - Priority Control Register 364bb87d2bSMacpaul Lin */ 374bb87d2bSMacpaul Lin #define FTAHBC020S_PCR_PLEVEL_(x) (1 << (x)) /* x: 1-15 */ 384bb87d2bSMacpaul Lin 394bb87d2bSMacpaul Lin /* 404bb87d2bSMacpaul Lin * FTAHBC020S_CR - Interrupt Control Register 414bb87d2bSMacpaul Lin */ 424bb87d2bSMacpaul Lin #define FTAHBC020S_CR_INTSTS (1 << 24) 434bb87d2bSMacpaul Lin #define FTAHBC020S_CR_RESP(x) (((x) & 0x3) << 20) 444bb87d2bSMacpaul Lin #define FTAHBC020S_CR_INTSMASK (1 << 16) 454bb87d2bSMacpaul Lin #define FTAHBC020S_CR_REMAP (1 << 0) 464bb87d2bSMacpaul Lin 474bb87d2bSMacpaul Lin #endif /* __FTAHBC020S_H */ 48