142d1f039Swdenk /* 242d1f039Swdenk * Copyright 2003 Motorola,Inc. 342d1f039Swdenk * Xianghua Xiao(x.xiao@motorola.com) 442d1f039Swdenk */ 542d1f039Swdenk 642d1f039Swdenk #ifndef __E500_H__ 742d1f039Swdenk #define __E500_H__ 842d1f039Swdenk 942d1f039Swdenk #ifndef __ASSEMBLY__ 1042d1f039Swdenk 1142d1f039Swdenk typedef struct 1242d1f039Swdenk { 13997399faSPrabhakar Kushwaha unsigned long freq_processor[CONFIG_MAX_CPUS]; 14*b8bf0adcSShaveta Leekha #ifdef CONFIG_HETROGENOUS_CLUSTERS 15*b8bf0adcSShaveta Leekha unsigned long freq_processor_dsp[CONFIG_MAX_DSP_CPUS]; 16*b8bf0adcSShaveta Leekha #endif 17997399faSPrabhakar Kushwaha unsigned long freq_systembus; 18997399faSPrabhakar Kushwaha unsigned long freq_ddrbus; 19997399faSPrabhakar Kushwaha unsigned long freq_localbus; 20997399faSPrabhakar Kushwaha unsigned long freq_qe; 2139aaca1fSKumar Gala #ifdef CONFIG_SYS_DPAA_FMAN 22997399faSPrabhakar Kushwaha unsigned long freq_fman[CONFIG_SYS_NUM_FMAN]; 2339aaca1fSKumar Gala #endif 24990e1a8cSHaiying Wang #ifdef CONFIG_SYS_DPAA_QBMAN 25997399faSPrabhakar Kushwaha unsigned long freq_qman; 26990e1a8cSHaiying Wang #endif 2739aaca1fSKumar Gala #ifdef CONFIG_SYS_DPAA_PME 28997399faSPrabhakar Kushwaha unsigned long freq_pme; 2939aaca1fSKumar Gala #endif 30*b8bf0adcSShaveta Leekha #ifdef CONFIG_SYS_CPRI 31*b8bf0adcSShaveta Leekha unsigned long freq_cpri; 32*b8bf0adcSShaveta Leekha #endif 33*b8bf0adcSShaveta Leekha #ifdef CONFIG_SYS_MAPLE 34*b8bf0adcSShaveta Leekha unsigned long freq_maple; 35*b8bf0adcSShaveta Leekha unsigned long freq_maple_ulb; 36*b8bf0adcSShaveta Leekha unsigned long freq_maple_etvpe; 37*b8bf0adcSShaveta Leekha #endif 380c12a159Svijay rai #ifdef CONFIG_SYS_FSL_SINGLE_SOURCE_CLK 390c12a159Svijay rai unsigned char diff_sysclk; 400c12a159Svijay rai #endif 4142d1f039Swdenk } MPC85xx_SYS_INFO; 4242d1f039Swdenk 4342d1f039Swdenk #endif /* _ASMLANGUAGE */ 4442d1f039Swdenk 4542d1f039Swdenk #define RESET_VECTOR 0xfffffffc 4642d1f039Swdenk 4742d1f039Swdenk #endif /* __E500_H__ */ 48