1*593e1e6dSJoseph Chen /* SPDX-License-Identifier: GPL-2.0 */ 2*593e1e6dSJoseph Chen #ifndef __DT_BINDINGS_POWER_RV1126_POWER_H__ 3*593e1e6dSJoseph Chen #define __DT_BINDINGS_POWER_RV1126_POWER_H__ 4*593e1e6dSJoseph Chen 5*593e1e6dSJoseph Chen /* VD_CORE */ 6*593e1e6dSJoseph Chen #define RV1126_PD_CPU_0 0 7*593e1e6dSJoseph Chen #define RV1126_PD_CPU_1 1 8*593e1e6dSJoseph Chen #define RV1126_PD_CPU_2 2 9*593e1e6dSJoseph Chen #define RV1126_PD_CPU_3 3 10*593e1e6dSJoseph Chen #define RV1126_PD_CORE_ALIVE 4 11*593e1e6dSJoseph Chen 12*593e1e6dSJoseph Chen /* VD_PMU */ 13*593e1e6dSJoseph Chen #define RV1126_PD_PMU 5 14*593e1e6dSJoseph Chen #define RV1126_PD_PMU_ALIVE 6 15*593e1e6dSJoseph Chen 16*593e1e6dSJoseph Chen /* VD_NPU */ 17*593e1e6dSJoseph Chen #define RV1126_PD_NPU 7 18*593e1e6dSJoseph Chen 19*593e1e6dSJoseph Chen /* VD_VEPU */ 20*593e1e6dSJoseph Chen #define RV1126_PD_VEPU 8 21*593e1e6dSJoseph Chen 22*593e1e6dSJoseph Chen /* VD_LOGIC */ 23*593e1e6dSJoseph Chen #define RV1126_PD_VI 9 24*593e1e6dSJoseph Chen #define RV1126_PD_VO 10 25*593e1e6dSJoseph Chen #define RV1126_PD_ISPP 11 26*593e1e6dSJoseph Chen #define RV1126_PD_VDPU 12 27*593e1e6dSJoseph Chen #define RV1126_PD_CRYPTO 13 28*593e1e6dSJoseph Chen #define RV1126_PD_DDR 14 29*593e1e6dSJoseph Chen #define RV1126_PD_NVM 15 30*593e1e6dSJoseph Chen #define RV1126_PD_SDIO 16 31*593e1e6dSJoseph Chen #define RV1126_PD_USB 17 32*593e1e6dSJoseph Chen #define RV1126_PD_LOGIC_ALIVE 18 33*593e1e6dSJoseph Chen 34*593e1e6dSJoseph Chen #endif 35