1a0d1be2bSFinley Xiao /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ 2a0d1be2bSFinley Xiao #ifndef __DT_BINDINGS_POWER_RK3576_POWER_H__ 3a0d1be2bSFinley Xiao #define __DT_BINDINGS_POWER_RK3576_POWER_H__ 4a0d1be2bSFinley Xiao 5a0d1be2bSFinley Xiao /* VD_NPU */ 6*77ac26eaSFinley Xiao #define RK3576_PD_NPU 0 7*77ac26eaSFinley Xiao #define RK3576_PD_NPUTOP 1 8*77ac26eaSFinley Xiao #define RK3576_PD_NPU0 2 9*77ac26eaSFinley Xiao #define RK3576_PD_NPU1 3 10a0d1be2bSFinley Xiao 11a0d1be2bSFinley Xiao /* VD_GPU */ 12*77ac26eaSFinley Xiao #define RK3576_PD_GPU 4 13a0d1be2bSFinley Xiao 14a0d1be2bSFinley Xiao /* VD_LOGIC */ 15*77ac26eaSFinley Xiao #define RK3576_PD_NVM 5 16*77ac26eaSFinley Xiao #define RK3576_PD_SDGMAC 6 17*77ac26eaSFinley Xiao #define RK3576_PD_USB 7 18*77ac26eaSFinley Xiao #define RK3576_PD_PHP 8 19*77ac26eaSFinley Xiao #define RK3576_PD_SUBPHP 9 20*77ac26eaSFinley Xiao #define RK3576_PD_AUDIO 10 21*77ac26eaSFinley Xiao #define RK3576_PD_VEPU0 11 22*77ac26eaSFinley Xiao #define RK3576_PD_VEPU1 12 23*77ac26eaSFinley Xiao #define RK3576_PD_VPU 13 24*77ac26eaSFinley Xiao #define RK3576_PD_VDEC 14 25*77ac26eaSFinley Xiao #define RK3576_PD_VI 15 26*77ac26eaSFinley Xiao #define RK3576_PD_VO0 16 27*77ac26eaSFinley Xiao #define RK3576_PD_VO1 17 28*77ac26eaSFinley Xiao #define RK3576_PD_VOP 18 29a0d1be2bSFinley Xiao 30a0d1be2bSFinley Xiao #endif 31