xref: /rk3399_rockchip-uboot/include/dt-bindings/pinctrl/dra.h (revision 7aa1a40876a0da0fadf360a352bba0adf8624904)
157cd681bSTom Rini /*
257cd681bSTom Rini  * This header provides constants for DRA pinctrl bindings.
357cd681bSTom Rini  *
457cd681bSTom Rini  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
557cd681bSTom Rini  * Author: Rajendra Nayak <rnayak@ti.com>
657cd681bSTom Rini  *
757cd681bSTom Rini  * This program is free software; you can redistribute it and/or modify
857cd681bSTom Rini  * it under the terms of the GNU General Public License version 2 as
957cd681bSTom Rini  * published by the Free Software Foundation.
1057cd681bSTom Rini  */
1157cd681bSTom Rini 
1257cd681bSTom Rini #ifndef _DT_BINDINGS_PINCTRL_DRA_H
1357cd681bSTom Rini #define _DT_BINDINGS_PINCTRL_DRA_H
1457cd681bSTom Rini 
1557cd681bSTom Rini /* DRA7 mux mode options for each pin. See TRM for options */
1657cd681bSTom Rini #define MUX_MODE0	0x0
1757cd681bSTom Rini #define MUX_MODE1	0x1
1857cd681bSTom Rini #define MUX_MODE2	0x2
1957cd681bSTom Rini #define MUX_MODE3	0x3
2057cd681bSTom Rini #define MUX_MODE4	0x4
2157cd681bSTom Rini #define MUX_MODE5	0x5
2257cd681bSTom Rini #define MUX_MODE6	0x6
2357cd681bSTom Rini #define MUX_MODE7	0x7
2457cd681bSTom Rini #define MUX_MODE8	0x8
2557cd681bSTom Rini #define MUX_MODE9	0x9
2657cd681bSTom Rini #define MUX_MODE10	0xa
2757cd681bSTom Rini #define MUX_MODE11	0xb
2857cd681bSTom Rini #define MUX_MODE12	0xc
2957cd681bSTom Rini #define MUX_MODE13	0xd
3057cd681bSTom Rini #define MUX_MODE14	0xe
3157cd681bSTom Rini #define MUX_MODE15	0xf
3257cd681bSTom Rini 
33*7aa1a408SLokesh Vutla /* Certain pins need virtual mode, but note: they may glitch */
34*7aa1a408SLokesh Vutla #define MUX_VIRTUAL_MODE0	(MODE_SELECT | (0x0 << 4))
35*7aa1a408SLokesh Vutla #define MUX_VIRTUAL_MODE1	(MODE_SELECT | (0x1 << 4))
36*7aa1a408SLokesh Vutla #define MUX_VIRTUAL_MODE2	(MODE_SELECT | (0x2 << 4))
37*7aa1a408SLokesh Vutla #define MUX_VIRTUAL_MODE3	(MODE_SELECT | (0x3 << 4))
38*7aa1a408SLokesh Vutla #define MUX_VIRTUAL_MODE4	(MODE_SELECT | (0x4 << 4))
39*7aa1a408SLokesh Vutla #define MUX_VIRTUAL_MODE5	(MODE_SELECT | (0x5 << 4))
40*7aa1a408SLokesh Vutla #define MUX_VIRTUAL_MODE6	(MODE_SELECT | (0x6 << 4))
41*7aa1a408SLokesh Vutla #define MUX_VIRTUAL_MODE7	(MODE_SELECT | (0x7 << 4))
42*7aa1a408SLokesh Vutla #define MUX_VIRTUAL_MODE8	(MODE_SELECT | (0x8 << 4))
43*7aa1a408SLokesh Vutla #define MUX_VIRTUAL_MODE9	(MODE_SELECT | (0x9 << 4))
44*7aa1a408SLokesh Vutla #define MUX_VIRTUAL_MODE10	(MODE_SELECT | (0xa << 4))
45*7aa1a408SLokesh Vutla #define MUX_VIRTUAL_MODE11	(MODE_SELECT | (0xb << 4))
46*7aa1a408SLokesh Vutla #define MUX_VIRTUAL_MODE12	(MODE_SELECT | (0xc << 4))
47*7aa1a408SLokesh Vutla #define MUX_VIRTUAL_MODE13	(MODE_SELECT | (0xd << 4))
48*7aa1a408SLokesh Vutla #define MUX_VIRTUAL_MODE14	(MODE_SELECT | (0xe << 4))
49*7aa1a408SLokesh Vutla #define MUX_VIRTUAL_MODE15	(MODE_SELECT | (0xf << 4))
50*7aa1a408SLokesh Vutla 
51*7aa1a408SLokesh Vutla #define MODE_SELECT		(1 << 8)
52*7aa1a408SLokesh Vutla 
5357cd681bSTom Rini #define PULL_ENA		(0 << 16)
5457cd681bSTom Rini #define PULL_DIS		(1 << 16)
5557cd681bSTom Rini #define PULL_UP			(1 << 17)
5657cd681bSTom Rini #define INPUT_EN		(1 << 18)
5757cd681bSTom Rini #define SLEWCONTROL		(1 << 19)
5857cd681bSTom Rini #define WAKEUP_EN		(1 << 24)
5957cd681bSTom Rini #define WAKEUP_EVENT		(1 << 25)
6057cd681bSTom Rini 
6157cd681bSTom Rini /* Active pin states */
6257cd681bSTom Rini #define PIN_OUTPUT		(0 | PULL_DIS)
6357cd681bSTom Rini #define PIN_OUTPUT_PULLUP	(PULL_UP)
6457cd681bSTom Rini #define PIN_OUTPUT_PULLDOWN	(0)
6557cd681bSTom Rini #define PIN_INPUT		(INPUT_EN | PULL_DIS)
6657cd681bSTom Rini #define PIN_INPUT_SLEW		(INPUT_EN | SLEWCONTROL)
6757cd681bSTom Rini #define PIN_INPUT_PULLUP	(PULL_ENA | INPUT_EN | PULL_UP)
6857cd681bSTom Rini #define PIN_INPUT_PULLDOWN	(PULL_ENA | INPUT_EN)
6957cd681bSTom Rini 
70*7aa1a408SLokesh Vutla /*
71*7aa1a408SLokesh Vutla  * Macro to allow using the absolute physical address instead of the
72*7aa1a408SLokesh Vutla  * padconf registers instead of the offset from padconf base.
73*7aa1a408SLokesh Vutla  */
74*7aa1a408SLokesh Vutla #define DRA7XX_CORE_IOPAD(pa, val)	(((pa) & 0xffff) - 0x3400) (val)
75*7aa1a408SLokesh Vutla 
7657cd681bSTom Rini #endif
7757cd681bSTom Rini 
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